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* Inquire about the number of operands from the instruction directly

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* Only check for a register if we are sure the instruction has one allocated


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14509 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman
2004-06-30 21:54:12 +00:00
parent ea09126414
commit b9e8f97aef
3 changed files with 12 additions and 6 deletions
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6
lib/Target/PowerPC/PPC32AsmPrinter.cpp
View File

@ -498,7 +498,8 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
const TargetInstrDescriptor &Desc = TII.get(Opcode); const TargetInstrDescriptor &Desc = TII.get(Opcode);
unsigned int i; unsigned int i;
unsigned int ArgCount = Desc.TSFlags & PPC32II::ArgCountMask; unsigned int ArgCount = MI->getNumOperands();
//Desc.TSFlags & PPC32II::ArgCountMask;
unsigned int ArgType[] = { unsigned int ArgType[] = {
(Desc.TSFlags >> PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask, (Desc.TSFlags >> PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask,
(Desc.TSFlags >> PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask, (Desc.TSFlags >> PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask,
@ -554,7 +555,8 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
O << ", "; O << ", ";
printOp(MI->getOperand(1)); printOp(MI->getOperand(1));
O << "("; O << "(";
if (MI->getOperand(2).getReg() == PPC32::R0) if (MI->getOperand(2).hasAllocatedReg() &&
MI->getOperand(2).getReg() == PPC32::R0)
O << "0"; O << "0";
else else
printOp(MI->getOperand(2)); printOp(MI->getOperand(2));

6
lib/Target/PowerPC/PPCAsmPrinter.cpp
View File

@ -498,7 +498,8 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
const TargetInstrDescriptor &Desc = TII.get(Opcode); const TargetInstrDescriptor &Desc = TII.get(Opcode);
unsigned int i; unsigned int i;
unsigned int ArgCount = Desc.TSFlags & PPC32II::ArgCountMask; unsigned int ArgCount = MI->getNumOperands();
//Desc.TSFlags & PPC32II::ArgCountMask;
unsigned int ArgType[] = { unsigned int ArgType[] = {
(Desc.TSFlags >> PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask, (Desc.TSFlags >> PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask,
(Desc.TSFlags >> PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask, (Desc.TSFlags >> PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask,
@ -554,7 +555,8 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
O << ", "; O << ", ";
printOp(MI->getOperand(1)); printOp(MI->getOperand(1));
O << "("; O << "(";
if (MI->getOperand(2).getReg() == PPC32::R0) if (MI->getOperand(2).hasAllocatedReg() &&
MI->getOperand(2).getReg() == PPC32::R0)
O << "0"; O << "0";
else else
printOp(MI->getOperand(2)); printOp(MI->getOperand(2));

6
lib/Target/PowerPC/PowerPCAsmPrinter.cpp
View File

@ -498,7 +498,8 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
const TargetInstrDescriptor &Desc = TII.get(Opcode); const TargetInstrDescriptor &Desc = TII.get(Opcode);
unsigned int i; unsigned int i;
unsigned int ArgCount = Desc.TSFlags & PPC32II::ArgCountMask; unsigned int ArgCount = MI->getNumOperands();
//Desc.TSFlags & PPC32II::ArgCountMask;
unsigned int ArgType[] = { unsigned int ArgType[] = {
(Desc.TSFlags >> PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask, (Desc.TSFlags >> PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask,
(Desc.TSFlags >> PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask, (Desc.TSFlags >> PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask,
@ -554,7 +555,8 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
O << ", "; O << ", ";
printOp(MI->getOperand(1)); printOp(MI->getOperand(1));
O << "("; O << "(";
if (MI->getOperand(2).getReg() == PPC32::R0) if (MI->getOperand(2).hasAllocatedReg() &&
MI->getOperand(2).getReg() == PPC32::R0)
O << "0"; O << "0";
else else
printOp(MI->getOperand(2)); printOp(MI->getOperand(2));