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tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77305 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2009-07-28 07:38:35 +00:00
parent db1e9981b8
commit bae20a6353
2 changed files with 31 additions and 0 deletions
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5
lib/Target/ARM/Thumb1RegisterInfo.cpp
View File

@ -505,9 +505,14 @@ void Thumb1RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
// r0 = -imm (this is then translated into a series of instructons)
// r0 = add r0, sp
emitThumbConstant(MBB, II, DestReg, Offset, TII, *this, dl);
MI.setDesc(TII.get(ARM::tADDhirr));
MI.getOperand(i).ChangeToRegister(DestReg, false, false, true);
MI.getOperand(i+1).ChangeToRegister(FrameReg, false);
if (Opcode == ARM::tADDi3) {
MachineInstrBuilder MIB(&MI);
AddDefaultPred(MIB);
}
}
return;
} else {

26
test/CodeGen/Thumb/2009-07-27-PEIAssert.ll Normal file
View File

@ -0,0 +1,26 @@
; RUN: llvm-as < %s | llc -mtriple=thumbv6-apple-darwin -relocation-model=pic -disable-fp-elim
%struct.LinkList = type { i32, %struct.LinkList* }
%struct.List = type { i32, i32* }
@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 ()* @main to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
define arm_apcscc i32 @main() nounwind {
entry:
%ll = alloca %struct.LinkList*, align 4 ; <%struct.LinkList**> [#uses=1]
%0 = call arm_apcscc i32 @ReadList(%struct.LinkList** %ll, %struct.List** null) nounwind ; <i32> [#uses=1]
switch i32 %0, label %bb5 [
i32 7, label %bb4
i32 42, label %bb3
]
bb3: ; preds = %entry
ret i32 1
bb4: ; preds = %entry
ret i32 0
bb5: ; preds = %entry
ret i32 1
}
declare arm_apcscc i32 @ReadList(%struct.LinkList** nocapture, %struct.List** nocapture) nounwind