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Add a natural stack alignment field to TargetData, and prevent InstCombine from
promoting allocas to preferred alignments that exceed the natural alignment. This avoids some potentially expensive dynamic stack realignments. The natural stack alignment is set in target data strings via the "S<size>" option. Size is in bits and must be a multiple of 8. The natural stack alignment defaults to "unspecified" (represented by a zero value), and the "unspecified" value does not prevent any alignment promotions. Target maintainers that care about avoiding promotions should explicitly add the "S<size>" option to their target data strings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141599 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1319,6 +1319,12 @@ target datalayout = "<i>layout specification</i>"
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the bits with the least significance have the lowest address
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location.</dd>
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<dt><tt>S<i>size</i></tt></dt>
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<dd>Specifies the natural alignment of the stack in bits. Alignment promotion
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of stack variables is limited to the natural stack alignment to avoid
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dynamic stack realignment. The stack alignment must be a multiple of
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8-bits, and currently defaults to 128 bits if unspecified.</dd>
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<dt><tt>p:<i>size</i>:<i>abi</i>:<i>pref</i></tt></dt>
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<dd>This specifies the <i>size</i> of a pointer and its <i>abi</i> and
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<i>preferred</i> alignments. All sizes are in bits. Specifying
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@ -70,6 +70,7 @@ private:
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unsigned PointerMemSize; ///< Pointer size in bytes
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unsigned PointerABIAlign; ///< Pointer ABI alignment
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unsigned PointerPrefAlign; ///< Pointer preferred alignment
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unsigned StackNaturalAlign; ///< Stack natural alignment
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SmallVector<unsigned char, 8> LegalIntWidths; ///< Legal Integers.
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@ -163,6 +164,11 @@ public:
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return !isLegalInteger(Width);
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}
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/// Returns true if the given alignment exceeds the natural stack alignment.
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bool exceedsNaturalStackAlignment(unsigned Align) const {
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return (StackNaturalAlign != 0) && (Align > StackNaturalAlign);
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}
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/// fitsInLegalInteger - This function returns true if the specified type fits
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/// in a native integer type supported by the CPU. For example, if the CPU
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/// only supports i32 as a native integer type, then i27 fits in a legal
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@ -53,9 +53,12 @@ ARMTargetMachine::ARMTargetMachine(const Target &T, StringRef TT,
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: ARMBaseTargetMachine(T, TT, CPU, FS, RM, CM), InstrInfo(Subtarget),
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DataLayout(Subtarget.isAPCS_ABI() ?
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std::string("e-p:32:32-f64:32:64-i64:32:64-"
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"v128:32:128-v64:32:64-n32") :
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"v128:32:128-v64:32:64-n32-S32") :
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Subtarget.isAAPCS_ABI() ?
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std::string("e-p:32:32-f64:64:64-i64:64:64-"
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"v128:64:128-v64:64:64-n32")),
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"v128:64:128-v64:64:64-n32-S64") :
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std::string("e-p:32:32-f64:64:64-i64:64:64-"
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"v128:64:128-v64:64:64-n32-S32")),
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ELFWriterInfo(*this),
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TLInfo(*this),
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TSInfo(*this),
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@ -75,10 +78,14 @@ ThumbTargetMachine::ThumbTargetMachine(const Target &T, StringRef TT,
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DataLayout(Subtarget.isAPCS_ABI() ?
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std::string("e-p:32:32-f64:32:64-i64:32:64-"
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"i16:16:32-i8:8:32-i1:8:32-"
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"v128:32:128-v64:32:64-a:0:32-n32") :
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"v128:32:128-v64:32:64-a:0:32-n32-S32") :
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Subtarget.isAAPCS_ABI() ?
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std::string("e-p:32:32-f64:64:64-i64:64:64-"
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"i16:16:32-i8:8:32-i1:8:32-"
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"v128:64:128-v64:64:64-a:0:32-n32")),
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"v128:64:128-v64:64:64-a:0:32-n32-S64") :
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std::string("e-p:32:32-f64:64:64-i64:64:64-"
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"i16:16:32-i8:8:32-i1:8:32-"
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"v128:64:128-v64:64:64-a:0:32-n32-S32")),
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ELFWriterInfo(*this),
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TLInfo(*this),
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TSInfo(*this),
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@ -139,6 +139,7 @@ void TargetData::init(StringRef Desc) {
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PointerMemSize = 8;
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PointerABIAlign = 8;
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PointerPrefAlign = PointerABIAlign;
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StackNaturalAlign = 0;
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// Default alignments
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setAlignment(INTEGER_ALIGN, 1, 1, 1); // i1
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@ -218,7 +219,12 @@ void TargetData::init(StringRef Desc) {
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Token = Split.second;
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} while (!Specifier.empty() || !Token.empty());
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break;
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case 'S': // Stack natural alignment.
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StackNaturalAlign = getInt(Specifier.substr(1));
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StackNaturalAlign /= 8;
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// FIXME: Should we really be truncating these alingments and
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// sizes silently?
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break;
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default:
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break;
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}
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@ -372,7 +378,9 @@ std::string TargetData::getStringRepresentation() const {
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OS << (LittleEndian ? "e" : "E")
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<< "-p:" << PointerMemSize*8 << ':' << PointerABIAlign*8
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<< ':' << PointerPrefAlign*8;
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<< ':' << PointerPrefAlign*8
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<< "-S" << StackNaturalAlign*8;
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for (unsigned i = 0, e = Alignments.size(); i != e; ++i) {
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const TargetAlignElem &AI = Alignments[i];
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OS << '-' << (char)AI.AlignType << AI.TypeBitWidth << ':'
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@ -862,7 +862,7 @@ define float @bar(float %x) nounwind {
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This IR (from PR6194):
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-darwin10.0.0"
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%0 = type { double, double }
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@ -1217,7 +1217,7 @@ Also check why xmm7 is not used at all in the function.
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Take the following:
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-S128"
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target triple = "i386-apple-darwin8"
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@in_exit.4870.b = internal global i1 false ; <i1*> [#uses=2]
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define fastcc void @abort_gzip() noreturn nounwind {
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@ -34,11 +34,11 @@ X86_32TargetMachine::X86_32TargetMachine(const Target &T, StringRef TT,
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Reloc::Model RM, CodeModel::Model CM)
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: X86TargetMachine(T, TT, CPU, FS, RM, CM, false),
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DataLayout(getSubtargetImpl()->isTargetDarwin() ?
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"e-p:32:32-f64:32:64-i64:32:64-f80:128:128-f128:128:128-n8:16:32" :
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"e-p:32:32-f64:32:64-i64:32:64-f80:128:128-f128:128:128-n8:16:32-S128" :
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(getSubtargetImpl()->isTargetCygMing() ||
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getSubtargetImpl()->isTargetWindows()) ?
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"e-p:32:32-f64:64:64-i64:64:64-f80:32:32-f128:128:128-n8:16:32" :
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"e-p:32:32-f64:32:64-i64:32:64-f80:32:32-f128:128:128-n8:16:32"),
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"e-p:32:32-f64:64:64-i64:64:64-f80:32:32-f128:128:128-n8:16:32-S32" :
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"e-p:32:32-f64:32:64-i64:32:64-f80:32:32-f128:128:128-n8:16:32-S32"),
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InstrInfo(*this),
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TSInfo(*this),
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TLInfo(*this),
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@ -50,7 +50,7 @@ X86_64TargetMachine::X86_64TargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS,
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Reloc::Model RM, CodeModel::Model CM)
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: X86TargetMachine(T, TT, CPU, FS, RM, CM, true),
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DataLayout("e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-f128:128:128-n8:16:32:64"),
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DataLayout("e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-f128:128:128-n8:16:32:64-S128"),
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InstrInfo(*this),
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TSInfo(*this),
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TLInfo(*this),
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@ -721,10 +721,14 @@ bool llvm::EliminateDuplicatePHINodes(BasicBlock *BB) {
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/// their preferred alignment from the beginning.
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///
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static unsigned enforceKnownAlignment(Value *V, unsigned Align,
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unsigned PrefAlign) {
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unsigned PrefAlign, const TargetData *TD) {
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V = V->stripPointerCasts();
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if (AllocaInst *AI = dyn_cast<AllocaInst>(V)) {
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// If the preferred alignment is greater than the natural stack alignment
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// then don't round up. This avoids dynamic stack realignment.
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if (TD && TD->exceedsNaturalStackAlignment(PrefAlign))
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return Align;
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// If there is a requested alignment and if this is an alloca, round up.
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if (AI->getAlignment() >= PrefAlign)
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return AI->getAlignment();
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@ -775,7 +779,7 @@ unsigned llvm::getOrEnforceKnownAlignment(Value *V, unsigned PrefAlign,
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Align = std::min(Align, +Value::MaximumAlignment);
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if (PrefAlign > Align)
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Align = enforceKnownAlignment(V, Align, PrefAlign);
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Align = enforceKnownAlignment(V, Align, PrefAlign, TD);
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// We don't need to make any adjustment.
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return Align;
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