Added a size field to the stack map record to handle subregister spills.

Implementing this on bigendian platforms could get strange. I added a
target hook, getStackSlotRange, per Jakob's recommendation to make
this as explicit as possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194942 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick
2013-11-17 01:36:23 +00:00
parent b7dabccbce
commit bb756ca244
10 changed files with 245 additions and 82 deletions

View File

@@ -26,18 +26,19 @@ public:
enum LocationType { Unprocessed, Register, Direct, Indirect, Constant,
ConstantIndex };
LocationType LocType;
unsigned Size;
unsigned Reg;
int64_t Offset;
Location() : LocType(Unprocessed), Reg(0), Offset(0) {}
Location(LocationType LocType, unsigned Reg, int64_t Offset)
: LocType(LocType), Reg(Reg), Offset(Offset) {}
Location() : LocType(Unprocessed), Size(0), Reg(0), Offset(0) {}
Location(LocationType LocType, unsigned Size, unsigned Reg, int64_t Offset)
: LocType(LocType), Size(Size), Reg(Reg), Offset(Offset) {}
};
// Typedef a function pointer for functions that parse sequences of operands
// and return a Location, plus a new "next" operand iterator.
typedef std::pair<Location, MachineInstr::const_mop_iterator>
(*OperandParser)(MachineInstr::const_mop_iterator,
MachineInstr::const_mop_iterator);
MachineInstr::const_mop_iterator, const TargetMachine&);
// OpTypes are used to encode information about the following logical
// operand (which may consist of several MachineOperands) for the

View File

@@ -181,6 +181,23 @@ public:
return false;
}
/// Compute the size in bytes and offset within a stack slot of a spilled
/// register or subregister.
///
/// \param [out] Size in bytes of the spilled value.
/// \param [out] Offset in bytes within the stack slot.
/// \returns true if both Size and Offset are successfully computed.
///
/// Not all subregisters have computable spill slots. For example,
/// subregisters registers may not be byte-sized, and a pair of discontiguous
/// subregisters has no single offset.
///
/// Targets with nontrivial bigendian implementations may need to override
/// this, particularly to support spilled vector registers.
virtual bool getStackSlotRange(const TargetRegisterClass *RC, unsigned SubIdx,
unsigned &Size, unsigned &Offset,
const TargetMachine *TM) const;
/// reMaterialize - Re-issue the specified 'original' instruction at the
/// specific location targeting a new destination register.
/// The register in Orig->getOperand(0).getReg() will be substituted by