6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-06-27 02:29:52 +00:00
Code Issues Projects Releases Wiki Activity

Attempt to fix the mingw32 bot.

Browse Source 
This should hopefully fix
http://lab.llvm.org:8011/builders/clang-x86_64-darwin11-self-mingw32

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182446 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2013-05-22 02:30:47 +00:00
parent 2134219b65
commit bbc45a3e28
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
lib/Target/R600/SIISelLowering.cpp
View File

@ -338,7 +338,7 @@ SDValue SITargetLowering::LowerBRCOND(SDValue BRCOND,
return Chain;
}
#define RSRC_DATA_FORMAT 0xf00000000000
const uint64_t RSRC_DATA_FORMAT = 0xf00000000000LL;
SDValue SITargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const {
StoreSDNode *StoreNode = cast<StoreSDNode>(Op);
@ -351,9 +351,9 @@ SDValue SITargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const {
return SDValue();
}
SDValue SrcSrc = DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i128,
DAG.getConstant(0, MVT::i64),
DAG.getConstant(RSRC_DATA_FORMAT, MVT::i64));
SDValue Zero = DAG.getConstant(0, MVT::i64);
SDValue Format = DAG.getConstant(RSRC_DATA_FORMAT, MVT::i64);
SDValue SrcSrc = DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i128, Zero, Format);
SDValue Ops[2];
Ops[0] = DAG.getNode(AMDGPUISD::BUFFER_STORE, DL, MVT::Other, Chain,