6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-05 12:31:33 +00:00
Code Issues Projects Releases Wiki Activity

Parse DAG patterns

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7577 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2003-08-04 20:44:43 +00:00
parent 8e9a9774eb
commit bc21c34ea1
2 changed files with 48 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
support/tools/TableGen/FileParser.y
View File

@ -161,6 +161,7 @@ static void addSubClass(Record *SC, const std::vector<Init*> &TemplateArgs) {
int IntVal; int IntVal;
RecTy *Ty; RecTy *Ty;
Init *Initializer; Init *Initializer;
std::vector<Init*> *DagValueList;
std::vector<Init*> *FieldList; std::vector<Init*> *FieldList;
std::vector<unsigned>*BitList; std::vector<unsigned>*BitList;
Record *Rec; Record *Rec;
@ -179,6 +180,7 @@ static void addSubClass(Record *SC, const std::vector<Init*> &TemplateArgs) {
%type <SubClassList> ClassList ClassListNE %type <SubClassList> ClassList ClassListNE
%type <IntVal> OptPrefix %type <IntVal> OptPrefix
%type <Initializer> Value OptValue %type <Initializer> Value OptValue
%type <DagValueList> DagArgList DagArgListNE
%type <FieldList> ValueList ValueListNE %type <FieldList> ValueList ValueListNE
%type <BitList> BitList OptBitList RBitList %type <BitList> BitList OptBitList RBitList
%type <StrVal> Declaration OptID %type <StrVal> Declaration OptID
@ -270,8 +272,30 @@ Value : INTVAL {
} }
$$ = new FieldInit($1, *$3); $$ = new FieldInit($1, *$3);
delete $3; delete $3;
} | '(' ID DagArgList ')' {
Record *D = Records.getDef(*$2);
if (D == 0) {
err() << "Invalid def '" << *$2 << "'!\n";
abort();
}
$$ = new DagInit(D, *$3);
delete $2; delete $3;
}; };
DagArgListNE : Value {
$$ = new std::vector<Init*>();
$$->push_back($1);
}
| DagArgListNE ',' Value {
$1->push_back($3);
};
DagArgList : /*empty*/ {
$$ = new std::vector<Init*>();
}
| DagArgListNE { $$ = $1; };
RBitList : INTVAL { RBitList : INTVAL {
$$ = new std::vector<unsigned>(); $$ = new std::vector<unsigned>();
$$->push_back($1); $$->push_back($1);

24
utils/TableGen/FileParser.y
View File

@ -161,6 +161,7 @@ static void addSubClass(Record *SC, const std::vector<Init*> &TemplateArgs) {
int IntVal; int IntVal;
RecTy *Ty; RecTy *Ty;
Init *Initializer; Init *Initializer;
std::vector<Init*> *DagValueList;
std::vector<Init*> *FieldList; std::vector<Init*> *FieldList;
std::vector<unsigned>*BitList; std::vector<unsigned>*BitList;
Record *Rec; Record *Rec;
@ -179,6 +180,7 @@ static void addSubClass(Record *SC, const std::vector<Init*> &TemplateArgs) {
%type <SubClassList> ClassList ClassListNE %type <SubClassList> ClassList ClassListNE
%type <IntVal> OptPrefix %type <IntVal> OptPrefix
%type <Initializer> Value OptValue %type <Initializer> Value OptValue
%type <DagValueList> DagArgList DagArgListNE
%type <FieldList> ValueList ValueListNE %type <FieldList> ValueList ValueListNE
%type <BitList> BitList OptBitList RBitList %type <BitList> BitList OptBitList RBitList
%type <StrVal> Declaration OptID %type <StrVal> Declaration OptID
@ -270,8 +272,30 @@ Value : INTVAL {
} }
$$ = new FieldInit($1, *$3); $$ = new FieldInit($1, *$3);
delete $3; delete $3;
} | '(' ID DagArgList ')' {
Record *D = Records.getDef(*$2);
if (D == 0) {
err() << "Invalid def '" << *$2 << "'!\n";
abort();
}
$$ = new DagInit(D, *$3);
delete $2; delete $3;
}; };
DagArgListNE : Value {
$$ = new std::vector<Init*>();
$$->push_back($1);
}
| DagArgListNE ',' Value {
$1->push_back($3);
};
DagArgList : /*empty*/ {
$$ = new std::vector<Init*>();
}
| DagArgListNE { $$ = $1; };
RBitList : INTVAL { RBitList : INTVAL {
$$ = new std::vector<unsigned>(); $$ = new std::vector<unsigned>();
$$->push_back($1); $$->push_back($1);