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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-09-24 23:28:41 +00:00
Reapply r128585 without generating a lib depedency cycle. An updated log:
- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and {STR,LDC}{2}_{PRE,POST} fixing the encoding wherever is possible. - Move all instructions which use am2offset without a pattern to use addrmode2. - Add a new encoding bit to describe the index mode used and teach printAddrMode2Operand to check by the addressing mode which index mode to print. - Testcases git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128632 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -181,18 +181,12 @@ void ARMInstPrinter::printSORegOperand(const MCInst *MI, unsigned OpNum,
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}
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}
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void ARMInstPrinter::printAddrMode2Operand(const MCInst *MI, unsigned Op,
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raw_ostream &O) {
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void ARMInstPrinter::printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,
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raw_ostream &O) {
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const MCOperand &MO1 = MI->getOperand(Op);
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const MCOperand &MO2 = MI->getOperand(Op+1);
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const MCOperand &MO3 = MI->getOperand(Op+2);
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if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
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printOperand(MI, Op, O);
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return;
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}
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O << "[" << getRegisterName(MO1.getReg());
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if (!MO2.getReg()) {
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@@ -215,6 +209,50 @@ void ARMInstPrinter::printAddrMode2Operand(const MCInst *MI, unsigned Op,
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O << "]";
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}
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void ARMInstPrinter::printAM2PostIndexOp(const MCInst *MI, unsigned Op,
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raw_ostream &O) {
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const MCOperand &MO1 = MI->getOperand(Op);
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const MCOperand &MO2 = MI->getOperand(Op+1);
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const MCOperand &MO3 = MI->getOperand(Op+2);
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O << "[" << getRegisterName(MO1.getReg()) << "], ";
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if (!MO2.getReg()) {
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unsigned ImmOffs = ARM_AM::getAM2Offset(MO3.getImm());
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O << '#'
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<< ARM_AM::getAddrOpcStr(ARM_AM::getAM2Op(MO3.getImm()))
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<< ImmOffs;
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return;
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}
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O << ARM_AM::getAddrOpcStr(ARM_AM::getAM2Op(MO3.getImm()))
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<< getRegisterName(MO2.getReg());
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if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
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O << ", "
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<< ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO3.getImm()))
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<< " #" << ShImm;
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}
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void ARMInstPrinter::printAddrMode2Operand(const MCInst *MI, unsigned Op,
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raw_ostream &O) {
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const MCOperand &MO1 = MI->getOperand(Op);
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if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
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printOperand(MI, Op, O);
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return;
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}
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const MCOperand &MO3 = MI->getOperand(Op+2);
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unsigned IdxMode = ARM_AM::getAM2IdxMode(MO3.getImm());
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if (IdxMode == ARMII::IndexModePost) {
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printAM2PostIndexOp(MI, Op, O);
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return;
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}
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printAM2PreOrOffsetIndexOp(MI, Op, O);
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}
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void ARMInstPrinter::printAddrMode2OffsetOperand(const MCInst *MI,
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unsigned OpNum,
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raw_ostream &O) {
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