diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index ee41ed13b46..a50664d1ba0 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -599,8 +599,6 @@ SDOperand PPCTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
     
     // Store the input value into Value#0 of the stack slot.
     unsigned InSize = MVT::getSizeInBits(Op.getOperand(0).getValueType())/8;
-    FIdx = DAG.getNode(ISD::ADD, MVT::i32, FIdx,
-                       DAG.getConstant(16-InSize, MVT::i32));
     SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
                                   Op.getOperand(0), FIdx,DAG.getSrcValue(NULL));
     return DAG.getNode(PPCISD::LVE_X, Op.getValueType(), Store, FIdx, 
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index 8af3e87723c..0eee1488769 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -961,7 +961,7 @@ def VNMSUBFP: VAForm_1<47, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, VRRC:$vC),
                        Requires<[FPContractions]>;
 
 def VPERM   : VAForm_1<43, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, VRRC:$vC),
-                       "vperm $vD, $vA, $vC, $vB", VecPerm,
+                       "vperm $vD, $vA, $vB, $vC", VecPerm,
                        [(set VRRC:$vD,
                              (PPCvperm (v4f32 VRRC:$vA), VRRC:$vB, VRRC:$vC))]>;