mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
This patch introduces changes to MipsAsmParser register parsing routines. The code now follows more deterministic path and makes the code more efficient and easier to maintain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188264 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Vladimir Medic
parent
d89266dd82
commit
bd980e5569
@ -63,6 +63,7 @@ class MipsAsmParser : public MCTargetAsmParser {
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MCSubtargetInfo &STI;
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MCAsmParser &Parser;
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MipsAssemblerOptions Options;
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bool hasConsumedDollar;
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#define GET_ASSEMBLER_HEADER
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#include "MipsGenAsmMatcher.inc"
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@ -175,15 +176,13 @@ class MipsAsmParser : public MCTargetAsmParser {
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int matchRegisterByNumber(unsigned RegNum, unsigned RegClass);
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int matchFPURegisterName(StringRef Name, FpFormatTy Format);
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int matchFPURegisterName(StringRef Name);
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void setFpFormat(FpFormatTy Format) {
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FpFormat = Format;
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}
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int matchFCCRegisterName(StringRef Name);
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void setDefaultFpFormat();
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int matchACRegisterName(StringRef Name);
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void setFpFormat(StringRef Format);
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int regKindToRegClass(int RegKind);
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FpFormatTy getFpFormat() {return FpFormat;}
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@ -195,7 +194,7 @@ class MipsAsmParser : public MCTargetAsmParser {
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SmallVectorImpl<MCInst> &Instructions);
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public:
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MipsAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser)
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: MCTargetAsmParser(), STI(sti), Parser(parser) {
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: MCTargetAsmParser(), STI(sti), Parser(parser), hasConsumedDollar(false) {
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// Initialize the set of available features.
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setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
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}
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@ -816,60 +815,76 @@ int MipsAsmParser::matchCPURegisterName(StringRef Name) {
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return CC;
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}
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int MipsAsmParser::matchFPURegisterName(StringRef Name, FpFormatTy Format) {
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int MipsAsmParser::matchFPURegisterName(StringRef Name) {
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if (Name[0] == 'f') {
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StringRef NumString = Name.substr(1);
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unsigned IntVal;
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if (NumString.getAsInteger(10, IntVal))
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return -1; // This is not an integer.
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if (IntVal > 31)
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if (IntVal > 31) // Maximum index for fpu register.
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return -1;
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return IntVal;
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}
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return -1;
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}
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if (Format == FP_FORMAT_S || Format == FP_FORMAT_W)
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return getReg(Mips::FGR32RegClassID, IntVal);
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if (Format == FP_FORMAT_D) {
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if (isFP64()) {
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return getReg(Mips::FGR64RegClassID, IntVal);
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}
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// Only even numbers available as register pairs.
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if ((IntVal > 31) || (IntVal % 2 != 0))
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int MipsAsmParser::matchFCCRegisterName(StringRef Name) {
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if (Name.startswith("fcc")) {
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StringRef NumString = Name.substr(3);
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unsigned IntVal;
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if (NumString.getAsInteger(10, IntVal))
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return -1; // This is not an integer.
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if (IntVal > 7) // There are only 8 fcc registers.
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return -1;
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return getReg(Mips::AFGR64RegClassID, IntVal / 2);
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return IntVal;
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}
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return -1;
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}
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int MipsAsmParser::matchACRegisterName(StringRef Name) {
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if (Name.startswith("acc")) {
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StringRef NumString = Name.substr(3);
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unsigned IntVal;
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if (NumString.getAsInteger(10, IntVal))
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return -1; // This is not an integer.
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if (IntVal > 3) // There are only 3 acc registers.
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return -1;
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return IntVal;
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}
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return -1;
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}
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int MipsAsmParser::matchRegisterName(StringRef Name, bool is64BitReg) {
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if (Name.equals("fcc0"))
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return Mips::FCC0;
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int CC;
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CC = matchCPURegisterName(Name);
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if (CC != -1)
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return matchRegisterByNumber(CC, is64BitReg ? Mips::GPR64RegClassID
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: Mips::GPR32RegClassID);
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return matchFPURegisterName(Name, getFpFormat());
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CC= matchFPURegisterName(Name);
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//TODO: decide about fpu register class
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return matchRegisterByNumber(CC, isFP64() ? Mips::FGR64RegClassID
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: Mips::FGR32RegClassID);
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}
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void MipsAsmParser::setDefaultFpFormat() {
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int MipsAsmParser::regKindToRegClass(int RegKind) {
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if (isMips64() || isFP64())
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FpFormat = FP_FORMAT_D;
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else
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FpFormat = FP_FORMAT_S;
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switch (RegKind) {
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case MipsOperand::Kind_GPR32: return Mips::GPR32RegClassID;
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case MipsOperand::Kind_GPR64: return Mips::GPR64RegClassID;
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case MipsOperand::Kind_HWRegs: return Mips::HWRegsRegClassID;
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case MipsOperand::Kind_FGR32Regs: return Mips::FGR32RegClassID;
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case MipsOperand::Kind_FGR64Regs: return Mips::FGR64RegClassID;
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case MipsOperand::Kind_AFGR64Regs: return Mips::AFGR64RegClassID;
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case MipsOperand::Kind_CCRRegs: return Mips::CCRRegClassID;
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case MipsOperand::Kind_ACC64DSP: return Mips::ACC64DSPRegClassID;
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case MipsOperand::Kind_FCCRegs: return Mips::FCCRegClassID;
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default :return -1;
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}
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void MipsAsmParser::setFpFormat(StringRef Format) {
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FpFormat = StringSwitch<FpFormatTy>(Format.lower())
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.Case(".s", FP_FORMAT_S)
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.Case(".d", FP_FORMAT_D)
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.Case(".l", FP_FORMAT_L)
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.Case(".w", FP_FORMAT_W)
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.Default(FP_FORMAT_NONE);
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}
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bool MipsAssemblerOptions::setATReg(unsigned Reg) {
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@ -889,8 +904,8 @@ unsigned MipsAsmParser::getReg(int RC, int RegNo) {
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}
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int MipsAsmParser::matchRegisterByNumber(unsigned RegNum, unsigned RegClass) {
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if (RegNum > 31)
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if (RegNum >
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getContext().getRegisterInfo()->getRegClass(RegClass).getNumRegs())
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return -1;
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return getReg(RegClass, RegNum);
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@ -1173,6 +1188,7 @@ MipsAsmParser::OperandMatchResultTy MipsAsmParser::parseMemOperand(
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const MCExpr *IdVal = 0;
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SMLoc S;
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bool isParenExpr = false;
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MipsAsmParser::OperandMatchResultTy Res = MatchOperand_NoMatch;
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// First operand is the offset.
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S = Parser.getTok().getLoc();
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@ -1211,21 +1227,12 @@ MipsAsmParser::OperandMatchResultTy MipsAsmParser::parseMemOperand(
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Parser.Lex(); // Eat the '(' token.
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}
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const AsmToken &Tok1 = Parser.getTok(); // Get next token
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if (Tok1.is(AsmToken::Dollar)) {
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Parser.Lex(); // Eat the '$' token.
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if (tryParseRegisterOperand(Operands, isMips64())) {
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Error(Parser.getTok().getLoc(), "unexpected token in operand");
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return MatchOperand_ParseFail;
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}
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Res = parseRegs(Operands, isMips64()? (int) MipsOperand::Kind_GPR64:
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(int) MipsOperand::Kind_GPR32);
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if (Res != MatchOperand_Success)
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return Res;
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} else {
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Error(Parser.getTok().getLoc(), "unexpected token in operand");
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return MatchOperand_ParseFail;
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}
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const AsmToken &Tok2 = Parser.getTok(); // Get next token.
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if (Tok2.isNot(AsmToken::RParen)) {
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if (Parser.getTok().isNot(AsmToken::RParen)) {
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Error(Parser.getTok().getLoc(), "')' expected");
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return MatchOperand_ParseFail;
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}
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@ -1261,22 +1268,88 @@ MipsAsmParser::OperandMatchResultTy
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MipsAsmParser::parseRegs(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
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int RegKind) {
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MipsOperand::RegisterKind Kind = (MipsOperand::RegisterKind)RegKind;
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if (getLexer().getKind() == AsmToken::Identifier) {
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if (getLexer().getKind() == AsmToken::Identifier
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&& !hasConsumedDollar) {
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if (searchSymbolAlias(Operands, Kind))
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return MatchOperand_Success;
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return MatchOperand_NoMatch;
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}
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SMLoc S = Parser.getTok().getLoc();
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// If the first token is not '$', we have an error.
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if (Parser.getTok().isNot(AsmToken::Dollar))
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if (Parser.getTok().isNot(AsmToken::Dollar) && !hasConsumedDollar)
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return MatchOperand_NoMatch;
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if (!hasConsumedDollar) {
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Parser.Lex(); // Eat the '$'
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hasConsumedDollar = true;
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}
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if (getLexer().getKind() == AsmToken::Identifier) {
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int RegNum = -1;
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std::string RegName = Parser.getTok().getString().lower();
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// Match register by name
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switch (RegKind) {
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case MipsOperand::Kind_GPR32:
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case MipsOperand::Kind_GPR64:
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RegNum = matchCPURegisterName(RegName);
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break;
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case MipsOperand::Kind_AFGR64Regs:
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case MipsOperand::Kind_FGR64Regs:
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case MipsOperand::Kind_FGR32Regs:
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RegNum = matchFPURegisterName(RegName);
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if (RegKind == MipsOperand::Kind_AFGR64Regs)
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RegNum /= 2;
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break;
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case MipsOperand::Kind_FCCRegs:
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RegNum = matchFCCRegisterName(RegName);
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break;
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case MipsOperand::Kind_ACC64DSP:
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RegNum = matchACRegisterName(RegName);
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break;
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default: break; // No match, value is set to -1.
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}
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// No match found, return _NoMatch to give a chance to other round.
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if (RegNum < 0)
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return MatchOperand_NoMatch;
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Parser.Lex(); // Eat $
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if (!tryParseRegisterOperand(Operands,
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RegKind == MipsOperand::Kind_GPR64)) {
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// Set the proper register kind.
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MipsOperand* op = static_cast<MipsOperand*>(Operands.back());
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op->setRegKind(Kind);
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if ((Kind == MipsOperand::Kind_GPR32)
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int RegVal = getReg(regKindToRegClass(Kind), RegNum);
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if (RegVal == -1)
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return MatchOperand_NoMatch;
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MipsOperand *Op = MipsOperand::CreateReg(RegVal, S,
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Parser.getTok().getLoc());
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Op->setRegKind(Kind);
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Operands.push_back(Op);
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hasConsumedDollar = false;
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Parser.Lex(); // Eat the register name.
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if ((RegKind == MipsOperand::Kind_GPR32)
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&& (getLexer().is(AsmToken::LParen))) {
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// Check if it is indexed addressing operand.
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Operands.push_back(MipsOperand::CreateToken("(", getLexer().getLoc()));
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Parser.Lex(); // Eat the parenthesis.
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if (parseRegs(Operands,RegKind) != MatchOperand_Success)
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return MatchOperand_NoMatch;
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if (getLexer().isNot(AsmToken::RParen))
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return MatchOperand_NoMatch;
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Operands.push_back(MipsOperand::CreateToken(")", getLexer().getLoc()));
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Parser.Lex();
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}
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return MatchOperand_Success;
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} else if (getLexer().getKind() == AsmToken::Integer) {
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unsigned RegNum = Parser.getTok().getIntVal();
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if (Kind == MipsOperand::Kind_HWRegs) {
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if (RegNum != 29)
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return MatchOperand_NoMatch;
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// Only hwreg 29 is supported, found at index 0.
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RegNum = 0;
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}
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int Reg = matchRegisterByNumber(RegNum, regKindToRegClass(Kind));
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if (Reg == -1)
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return MatchOperand_NoMatch;
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MipsOperand *Op = MipsOperand::CreateReg(Reg, S, Parser.getTok().getLoc());
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Op->setRegKind(Kind);
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Operands.push_back(Op);
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hasConsumedDollar = false;
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Parser.Lex(); // Eat the register number.
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if ((RegKind == MipsOperand::Kind_GPR32)
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&& (getLexer().is(AsmToken::LParen))) {
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// Check if it is indexed addressing operand.
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Operands.push_back(MipsOperand::CreateToken("(", getLexer().getLoc()));
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@ -1311,9 +1384,6 @@ MipsAsmParser::parseAFGR64Regs(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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if (isFP64())
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return MatchOperand_NoMatch;
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// Double operand is expected, set appropriate format
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setFpFormat(FP_FORMAT_D);
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return parseRegs(Operands, (int) MipsOperand::Kind_AFGR64Regs);
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}
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@ -1321,83 +1391,22 @@ MipsAsmParser::OperandMatchResultTy
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MipsAsmParser::parseFGR64Regs(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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if (!isFP64())
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return MatchOperand_NoMatch;
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// Double operand is expected, set appropriate format
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setFpFormat(FP_FORMAT_D);
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return parseRegs(Operands, (int) MipsOperand::Kind_FGR64Regs);
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}
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MipsAsmParser::OperandMatchResultTy
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MipsAsmParser::parseFGR32Regs(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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// Single operand is expected, set appropriate format
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setFpFormat(FP_FORMAT_S);
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return parseRegs(Operands, (int) MipsOperand::Kind_FGR32Regs);
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}
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MipsAsmParser::OperandMatchResultTy
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MipsAsmParser::parseFCCRegs(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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// If the first token is not '$' we have an error.
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if (Parser.getTok().isNot(AsmToken::Dollar))
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return MatchOperand_NoMatch;
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SMLoc S = Parser.getTok().getLoc();
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Parser.Lex(); // Eat the '$'
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const AsmToken &Tok = Parser.getTok(); // Get next token.
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if (Tok.isNot(AsmToken::Identifier))
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return MatchOperand_NoMatch;
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if (!Tok.getIdentifier().startswith("fcc"))
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return MatchOperand_NoMatch;
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StringRef NumString = Tok.getIdentifier().substr(3);
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unsigned IntVal;
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if (NumString.getAsInteger(10, IntVal))
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return MatchOperand_NoMatch;
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unsigned Reg = matchRegisterByNumber(IntVal, Mips::FCCRegClassID);
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MipsOperand *Op = MipsOperand::CreateReg(Reg, S, Parser.getTok().getLoc());
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Op->setRegKind(MipsOperand::Kind_FCCRegs);
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Operands.push_back(Op);
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Parser.Lex(); // Eat the register number.
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return MatchOperand_Success;
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return parseRegs(Operands, (int) MipsOperand::Kind_FCCRegs);
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}
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MipsAsmParser::OperandMatchResultTy
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MipsAsmParser::parseACC64DSP(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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// If the first token is not '$' we have an error.
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if (Parser.getTok().isNot(AsmToken::Dollar))
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return MatchOperand_NoMatch;
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SMLoc S = Parser.getTok().getLoc();
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Parser.Lex(); // Eat the '$'
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const AsmToken &Tok = Parser.getTok(); // Get next token.
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if (Tok.isNot(AsmToken::Identifier))
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return MatchOperand_NoMatch;
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if (!Tok.getIdentifier().startswith("acc"))
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return MatchOperand_NoMatch;
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StringRef NumString = Tok.getIdentifier().substr(3);
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unsigned IntVal;
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if (NumString.getAsInteger(10, IntVal))
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return MatchOperand_NoMatch;
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unsigned Reg = matchRegisterByNumber(IntVal, Mips::ACC64DSPRegClassID);
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MipsOperand *Op = MipsOperand::CreateReg(Reg, S, Parser.getTok().getLoc());
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Op->setRegKind(MipsOperand::Kind_ACC64DSP);
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Operands.push_back(Op);
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Parser.Lex(); // Eat the register number.
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return MatchOperand_Success;
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return parseRegs(Operands, (int) MipsOperand::Kind_ACC64DSP);
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}
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bool MipsAsmParser::searchSymbolAlias(
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@ -1428,17 +1437,19 @@ bool MipsAsmParser::searchSymbolAlias(
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switch (Kind) {
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case MipsOperand::Kind_AFGR64Regs:
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case MipsOperand::Kind_FGR64Regs:
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RegNum = matchFPURegisterName(DefSymbol.substr(1), FP_FORMAT_D);
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RegNum = matchFPURegisterName(DefSymbol.substr(1));
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break;
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case MipsOperand::Kind_FGR32Regs:
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RegNum = matchFPURegisterName(DefSymbol.substr(1), FP_FORMAT_S);
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RegNum = matchFPURegisterName(DefSymbol.substr(1));
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break;
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case MipsOperand::Kind_GPR64:
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case MipsOperand::Kind_GPR32:
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default:
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RegNum = matchRegisterName(DefSymbol.substr(1), isMips64());
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RegNum = matchCPURegisterName(DefSymbol.substr(1));
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break;
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}
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if (RegNum > -1)
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RegNum = getReg(regKindToRegClass(Kind), RegNum);
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}
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if (RegNum > -1) {
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Parser.Lex();
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@ -1463,53 +1474,12 @@ bool MipsAsmParser::searchSymbolAlias(
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MipsAsmParser::OperandMatchResultTy
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MipsAsmParser::parseHWRegs(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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// If the first token is not '$' we have error.
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if (Parser.getTok().isNot(AsmToken::Dollar))
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return MatchOperand_NoMatch;
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SMLoc S = Parser.getTok().getLoc();
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Parser.Lex(); // Eat the '$'.
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const AsmToken &Tok = Parser.getTok(); // Get the next token.
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if (Tok.isNot(AsmToken::Integer))
|
||||
return MatchOperand_NoMatch;
|
||||
|
||||
unsigned RegNum = Tok.getIntVal();
|
||||
// At the moment only hwreg29 is supported.
|
||||
if (RegNum != 29)
|
||||
return MatchOperand_ParseFail;
|
||||
|
||||
MipsOperand *op = MipsOperand::CreateReg(Mips::HWR29, S,
|
||||
Parser.getTok().getLoc());
|
||||
op->setRegKind(MipsOperand::Kind_HWRegs);
|
||||
Operands.push_back(op);
|
||||
|
||||
Parser.Lex(); // Eat the register number.
|
||||
return MatchOperand_Success;
|
||||
return parseRegs(Operands, (int) MipsOperand::Kind_HWRegs);
|
||||
}
|
||||
|
||||
MipsAsmParser::OperandMatchResultTy
|
||||
MipsAsmParser::parseCCRRegs(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
|
||||
// If the first token is not '$' we have an error.
|
||||
if (Parser.getTok().isNot(AsmToken::Dollar))
|
||||
return MatchOperand_NoMatch;
|
||||
|
||||
SMLoc S = Parser.getTok().getLoc();
|
||||
Parser.Lex(); // Eat the '$'
|
||||
|
||||
const AsmToken &Tok = Parser.getTok(); // Get next token.
|
||||
|
||||
if (Tok.isNot(AsmToken::Integer))
|
||||
return MatchOperand_NoMatch;
|
||||
|
||||
unsigned Reg = matchRegisterByNumber(Tok.getIntVal(), Mips::CCRRegClassID);
|
||||
|
||||
MipsOperand *Op = MipsOperand::CreateReg(Reg, S, Parser.getTok().getLoc());
|
||||
Op->setRegKind(MipsOperand::Kind_CCRRegs);
|
||||
Operands.push_back(Op);
|
||||
|
||||
Parser.Lex(); // Eat the register number.
|
||||
return MatchOperand_Success;
|
||||
return parseRegs(Operands, (int) MipsOperand::Kind_CCRRegs);
|
||||
}
|
||||
|
||||
MCSymbolRefExpr::VariantKind MipsAsmParser::getVariantKind(StringRef Symbol) {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user