From bd9f0eefb230083de2ed009bb0be6c9386a6c04b Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sun, 9 Jan 2005 20:20:29 +0000 Subject: [PATCH] Codegen (Reg|imm)+&GV as an LEA, because we cannot put it into the immediate field of an ADDri (due to current restrictions on MachineOperand :( ). This allows us to generate: leal Data+16000, %edx instead of: movl $Data, %edx addl $16000, %edx git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19420 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelPattern.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/Target/X86/X86ISelPattern.cpp b/lib/Target/X86/X86ISelPattern.cpp index 13839ffb9a2..265e38815bb 100644 --- a/lib/Target/X86/X86ISelPattern.cpp +++ b/lib/Target/X86/X86ISelPattern.cpp @@ -1027,11 +1027,11 @@ unsigned ISel::SelectExpr(SDOperand N) { if (!SelectAddress(N.getOperand(0), AM) && !SelectAddress(N.getOperand(1), AM)) { // If this is not just an add, emit the LEA. For a simple add (like - // reg+reg or reg+imm), we just emit an add. If might be a good idea to + // reg+reg or reg+imm), we just emit an add. It might be a good idea to // leave this as LEA, then peephole it to 'ADD' after two address elim // happens. if (AM.Scale != 1 || AM.BaseType == X86AddressMode::FrameIndexBase || - AM.Base.Reg && AM.IndexReg && (AM.Disp || AM.GV)) { + AM.GV || (AM.Base.Reg && AM.IndexReg && AM.Disp)) { addFullAddress(BuildMI(BB, X86::LEA32r, 4, Result), AM); return Result; }