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Converted to using llvm streams instead of <iostream>s

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31992 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2006-11-29 00:39:47 +00:00
parent 68fe61d6a1
commit bdc679d564
6 changed files with 103 additions and 90 deletions
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5
include/llvm/CodeGen/LiveInterval.h
View File

@ -258,10 +258,9 @@ namespace llvm {
return beginNumber() < other.beginNumber(); return beginNumber() < other.beginNumber();
} }
void print(llvm_ostream &OS, const MRegisterInfo *MRI = 0) const; void print(llvm_ostream OS, const MRegisterInfo *MRI = 0) const;
void print(std::ostream &OS, const MRegisterInfo *MRI = 0) const { void print(std::ostream &OS, const MRegisterInfo *MRI = 0) const {
llvm_ostream L(OS); print(llvm_ostream(OS), MRI);
L << MRI;
} }
void dump() const; void dump() const;

25
lib/CodeGen/AsmPrinter.cpp
View File

@ -20,11 +20,12 @@
#include "llvm/CodeGen/MachineJumpTableInfo.h" #include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/Support/Mangler.h" #include "llvm/Support/Mangler.h"
#include "llvm/Support/MathExtras.h" #include "llvm/Support/MathExtras.h"
#include "llvm/Support/Streams.h"
#include "llvm/Target/TargetAsmInfo.h" #include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h" #include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetLowering.h" #include "llvm/Target/TargetLowering.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <iostream> #include <ostream>
#include <cerrno> #include <cerrno>
using namespace llvm; using namespace llvm;
@ -667,7 +668,7 @@ void AsmPrinter::PrintSpecial(const MachineInstr *MI, const char *Code) {
if (LastMI != MI) { ++Counter; LastMI = MI; } if (LastMI != MI) { ++Counter; LastMI = MI; }
O << Counter; O << Counter;
} else { } else {
std::cerr << "Unknown special formatter '" << Code llvm_cerr << "Unknown special formatter '" << Code
<< "' for machine instr: " << *MI; << "' for machine instr: " << *MI;
exit(1); exit(1);
} }
@ -736,8 +737,8 @@ void AsmPrinter::printInlineAsm(const MachineInstr *MI) const {
case '(': // $( -> same as GCC's { character. case '(': // $( -> same as GCC's { character.
++LastEmitted; // Consume '(' character. ++LastEmitted; // Consume '(' character.
if (CurVariant != -1) { if (CurVariant != -1) {
std::cerr << "Nested variants found in inline asm string: '" llvm_cerr << "Nested variants found in inline asm string: '"
<< AsmStr << "'\n"; << AsmStr << "'\n";
exit(1); exit(1);
} }
CurVariant = 0; // We're in the first variant now. CurVariant = 0; // We're in the first variant now.
@ -745,8 +746,8 @@ void AsmPrinter::printInlineAsm(const MachineInstr *MI) const {
case '|': case '|':
++LastEmitted; // consume '|' character. ++LastEmitted; // consume '|' character.
if (CurVariant == -1) { if (CurVariant == -1) {
std::cerr << "Found '|' character outside of variant in inline asm " llvm_cerr << "Found '|' character outside of variant in inline asm "
<< "string: '" << AsmStr << "'\n"; << "string: '" << AsmStr << "'\n";
exit(1); exit(1);
} }
++CurVariant; // We're in the next variant. ++CurVariant; // We're in the next variant.
@ -754,7 +755,7 @@ void AsmPrinter::printInlineAsm(const MachineInstr *MI) const {
case ')': // $) -> same as GCC's } char. case ')': // $) -> same as GCC's } char.
++LastEmitted; // consume ')' character. ++LastEmitted; // consume ')' character.
if (CurVariant == -1) { if (CurVariant == -1) {
std::cerr << "Found '}' character outside of variant in inline asm " llvm_cerr << "Found '}' character outside of variant in inline asm "
<< "string: '" << AsmStr << "'\n"; << "string: '" << AsmStr << "'\n";
exit(1); exit(1);
} }
@ -773,7 +774,7 @@ void AsmPrinter::printInlineAsm(const MachineInstr *MI) const {
char *IDEnd; char *IDEnd;
long Val = strtol(IDStart, &IDEnd, 10); // We only accept numbers for IDs. long Val = strtol(IDStart, &IDEnd, 10); // We only accept numbers for IDs.
if (!isdigit(*IDStart) || (Val == 0 && errno == EINVAL)) { if (!isdigit(*IDStart) || (Val == 0 && errno == EINVAL)) {
std::cerr << "Bad $ operand number in inline asm string: '" llvm_cerr << "Bad $ operand number in inline asm string: '"
<< AsmStr << "'\n"; << AsmStr << "'\n";
exit(1); exit(1);
} }
@ -787,7 +788,7 @@ void AsmPrinter::printInlineAsm(const MachineInstr *MI) const {
if (*LastEmitted == ':') { if (*LastEmitted == ':') {
++LastEmitted; // Consume ':' character. ++LastEmitted; // Consume ':' character.
if (*LastEmitted == 0) { if (*LastEmitted == 0) {
std::cerr << "Bad ${:} expression in inline asm string: '" llvm_cerr << "Bad ${:} expression in inline asm string: '"
<< AsmStr << "'\n"; << AsmStr << "'\n";
exit(1); exit(1);
} }
@ -797,7 +798,7 @@ void AsmPrinter::printInlineAsm(const MachineInstr *MI) const {
} }
if (*LastEmitted != '}') { if (*LastEmitted != '}') {
std::cerr << "Bad ${} expression in inline asm string: '" llvm_cerr << "Bad ${} expression in inline asm string: '"
<< AsmStr << "'\n"; << AsmStr << "'\n";
exit(1); exit(1);
} }
@ -805,7 +806,7 @@ void AsmPrinter::printInlineAsm(const MachineInstr *MI) const {
} }
if ((unsigned)Val >= NumOperands-1) { if ((unsigned)Val >= NumOperands-1) {
std::cerr << "Invalid $ operand number in inline asm string: '" llvm_cerr << "Invalid $ operand number in inline asm string: '"
<< AsmStr << "'\n"; << AsmStr << "'\n";
exit(1); exit(1);
} }
@ -840,7 +841,7 @@ void AsmPrinter::printInlineAsm(const MachineInstr *MI) const {
} }
} }
if (Error) { if (Error) {
std::cerr << "Invalid operand found in inline asm: '" llvm_cerr << "Invalid operand found in inline asm: '"
<< AsmStr << "'\n"; << AsmStr << "'\n";
MI->dump(); MI->dump();
exit(1); exit(1);

20
lib/CodeGen/DwarfWriter.cpp
View File

@ -32,7 +32,7 @@
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetFrameInfo.h" #include "llvm/Target/TargetFrameInfo.h"
#include <iostream> #include <ostream>
#include <string> #include <string>
using namespace llvm; using namespace llvm;
@ -139,6 +139,9 @@ public:
} }
#ifndef NDEBUG #ifndef NDEBUG
void print(llvm_ostream &O) const {
if (O.stream()) print(*O.stream());
}
void print(std::ostream &O) const { void print(std::ostream &O) const {
O << ".debug_" << Tag; O << ".debug_" << Tag;
if (Number) O << Number; if (Number) O << Number;
@ -244,6 +247,9 @@ public:
void Emit(const Dwarf &DW) const; void Emit(const Dwarf &DW) const;
#ifndef NDEBUG #ifndef NDEBUG
void print(llvm_ostream &O) {
if (O.stream()) print(*O.stream());
}
void print(std::ostream &O); void print(std::ostream &O);
void dump(); void dump();
#endif #endif
@ -331,6 +337,9 @@ public:
void Profile(FoldingSetNodeID &ID) ; void Profile(FoldingSetNodeID &ID) ;
#ifndef NDEBUG #ifndef NDEBUG
void print(llvm_ostream &O, unsigned IncIndent = 0) {
if (O.stream()) print(*O.stream(), IncIndent);
}
void print(std::ostream &O, unsigned IncIndent = 0); void print(std::ostream &O, unsigned IncIndent = 0);
void dump(); void dump();
#endif #endif
@ -379,6 +388,9 @@ public:
virtual void Profile(FoldingSetNodeID &ID) = 0; virtual void Profile(FoldingSetNodeID &ID) = 0;
#ifndef NDEBUG #ifndef NDEBUG
void print(llvm_ostream &O) {
if (O.stream()) print(*O.stream());
}
virtual void print(std::ostream &O) = 0; virtual void print(std::ostream &O) = 0;
void dump(); void dump();
#endif #endif
@ -2839,14 +2851,14 @@ void DIEAbbrev::print(std::ostream &O) {
<< "\n"; << "\n";
} }
} }
void DIEAbbrev::dump() { print(std::cerr); } void DIEAbbrev::dump() { print(llvm_cerr); }
#endif #endif
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#ifndef NDEBUG #ifndef NDEBUG
void DIEValue::dump() { void DIEValue::dump() {
print(std::cerr); print(llvm_cerr);
} }
#endif #endif
@ -3055,7 +3067,7 @@ void DIE::print(std::ostream &O, unsigned IncIndent) {
} }
void DIE::dump() { void DIE::dump() {
print(std::cerr); print(llvm_cerr);
} }
#endif #endif

5
lib/CodeGen/ELFWriter.cpp
View File

@ -38,7 +38,8 @@
#include "llvm/Target/TargetData.h" #include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Mangler.h" #include "llvm/Support/Mangler.h"
#include <iostream> #include "llvm/Support/Streams.h"
#include <ostream>
using namespace llvm; using namespace llvm;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
@ -103,7 +104,7 @@ void ELFCodeEmitter::startFunction(MachineFunction &F) {
ELFWriter::ELFSection::SHF_EXECINSTR | ELFWriter::ELFSection::SHF_EXECINSTR |
ELFWriter::ELFSection::SHF_ALLOC); ELFWriter::ELFSection::SHF_ALLOC);
OutBuffer = &ES->SectionData; OutBuffer = &ES->SectionData;
std::cerr << "FIXME: This code needs to be updated for changes in the" llvm_cerr << "FIXME: This code needs to be updated for changes in the"
<< " CodeEmitter interfaces. In particular, this should set " << " CodeEmitter interfaces. In particular, this should set "
<< "BufferBegin/BufferEnd/CurBufferPtr, not deal with OutBuffer!"; << "BufferBegin/BufferEnd/CurBufferPtr, not deal with OutBuffer!";
abort(); abort();

2
lib/CodeGen/LiveInterval.cpp
View File

@ -475,7 +475,7 @@ void LiveRange::dump() const {
llvm_cerr << *this << "\n"; llvm_cerr << *this << "\n";
} }
void LiveInterval::print(llvm_ostream &OS, const MRegisterInfo *MRI) const { void LiveInterval::print(llvm_ostream OS, const MRegisterInfo *MRI) const {
if (MRI && MRegisterInfo::isPhysicalRegister(reg)) if (MRI && MRegisterInfo::isPhysicalRegister(reg))
OS << MRI->getName(reg); OS << MRI->getName(reg);
else else

136
lib/CodeGen/LiveIntervalAnalysis.cpp
View File

@ -33,7 +33,6 @@
#include "llvm/ADT/Statistic.h" #include "llvm/ADT/Statistic.h"
#include "llvm/ADT/STLExtras.h" #include "llvm/ADT/STLExtras.h"
#include <algorithm> #include <algorithm>
#include <iostream>
using namespace llvm; using namespace llvm;
namespace { namespace {
@ -155,11 +154,11 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
numIntervals += getNumIntervals(); numIntervals += getNumIntervals();
DEBUG(std::cerr << "********** INTERVALS **********\n"; DOUT << "********** INTERVALS **********\n";
for (iterator I = begin(), E = end(); I != E; ++I) { for (iterator I = begin(), E = end(); I != E; ++I) {
I->second.print(std::cerr, mri_); I->second.print(DOUT, mri_);
std::cerr << "\n"; DOUT << "\n";
}); }
// Join (coallesce) intervals if requested. // Join (coallesce) intervals if requested.
if (EnableJoining) joinIntervals(); if (EnableJoining) joinIntervals();
@ -236,8 +235,8 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
void LiveIntervals::print(std::ostream &O, const Module* ) const { void LiveIntervals::print(std::ostream &O, const Module* ) const {
O << "********** INTERVALS **********\n"; O << "********** INTERVALS **********\n";
for (const_iterator I = begin(), E = end(); I != E; ++I) { for (const_iterator I = begin(), E = end(); I != E; ++I) {
I->second.print(std::cerr, mri_); I->second.print(DOUT, mri_);
std::cerr << "\n"; DOUT << "\n";
} }
O << "********** MACHINEINSTRS **********\n"; O << "********** MACHINEINSTRS **********\n";
@ -292,11 +291,11 @@ LiveIntervals::CreateNewLiveInterval(const LiveInterval *LI,
for (std::vector<LiveRange>::const_iterator for (std::vector<LiveRange>::const_iterator
I = LRs.begin(), E = LRs.end(); I != E; ++I) { I = LRs.begin(), E = LRs.end(); I != E; ++I) {
DEBUG(std::cerr << " Adding live range " << *I << " to new interval\n"); DOUT << " Adding live range " << *I << " to new interval\n";
NewLI.addRange(*I); NewLI.addRange(*I);
} }
DEBUG(std::cerr << "Created new live interval " << NewLI << "\n"); DOUT << "Created new live interval " << NewLI << "\n";
return NewLI; return NewLI;
} }
@ -311,8 +310,9 @@ addIntervalsForSpills(const LiveInterval &li, VirtRegMap &vrm, int slot) {
assert(li.weight != HUGE_VALF && assert(li.weight != HUGE_VALF &&
"attempt to spill already spilled interval!"); "attempt to spill already spilled interval!");
DEBUG(std::cerr << "\t\t\t\tadding intervals for spills for interval: "; DOUT << "\t\t\t\tadding intervals for spills for interval: ";
li.print(std::cerr, mri_); std::cerr << '\n'); li.print(DOUT, mri_);
DOUT << '\n';
const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(li.reg); const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(li.reg);
@ -388,13 +388,13 @@ addIntervalsForSpills(const LiveInterval &li, VirtRegMap &vrm, int slot) {
if (HasUse) { if (HasUse) {
LiveRange LR(getLoadIndex(index), getUseIndex(index), LiveRange LR(getLoadIndex(index), getUseIndex(index),
nI.getNextValue(~0U, 0)); nI.getNextValue(~0U, 0));
DEBUG(std::cerr << " +" << LR); DOUT << " +" << LR;
nI.addRange(LR); nI.addRange(LR);
} }
if (HasDef) { if (HasDef) {
LiveRange LR(getDefIndex(index), getStoreIndex(index), LiveRange LR(getDefIndex(index), getStoreIndex(index),
nI.getNextValue(~0U, 0)); nI.getNextValue(~0U, 0));
DEBUG(std::cerr << " +" << LR); DOUT << " +" << LR;
nI.addRange(LR); nI.addRange(LR);
} }
@ -404,8 +404,9 @@ addIntervalsForSpills(const LiveInterval &li, VirtRegMap &vrm, int slot) {
if (lv_) if (lv_)
lv_->addVirtualRegisterKilled(NewVReg, MI); lv_->addVirtualRegisterKilled(NewVReg, MI);
DEBUG(std::cerr << "\t\t\t\tadded new interval: "; DOUT << "\t\t\t\tadded new interval: ";
nI.print(std::cerr, mri_); std::cerr << '\n'); nI.print(DOUT, mri_);
DOUT << '\n';
} }
} }
} }
@ -417,9 +418,9 @@ addIntervalsForSpills(const LiveInterval &li, VirtRegMap &vrm, int slot) {
void LiveIntervals::printRegName(unsigned reg) const { void LiveIntervals::printRegName(unsigned reg) const {
if (MRegisterInfo::isPhysicalRegister(reg)) if (MRegisterInfo::isPhysicalRegister(reg))
std::cerr << mri_->getName(reg); llvm_cerr << mri_->getName(reg);
else else
std::cerr << "%reg" << reg; llvm_cerr << "%reg" << reg;
} }
/// isReDefinedByTwoAddr - Returns true if the Reg re-definition is due to /// isReDefinedByTwoAddr - Returns true if the Reg re-definition is due to
@ -445,7 +446,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
MachineBasicBlock::iterator mi, MachineBasicBlock::iterator mi,
unsigned MIIdx, unsigned MIIdx,
LiveInterval &interval) { LiveInterval &interval) {
DEBUG(std::cerr << "\t\tregister: "; printRegName(interval.reg)); DOUT << "\t\tregister: "; DEBUG(printRegName(interval.reg));
LiveVariables::VarInfo& vi = lv_->getVarInfo(interval.reg); LiveVariables::VarInfo& vi = lv_->getVarInfo(interval.reg);
// Virtual registers may be defined multiple times (due to phi // Virtual registers may be defined multiple times (due to phi
@ -485,7 +486,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
"Shouldn't be alive across any blocks!"); "Shouldn't be alive across any blocks!");
LiveRange LR(defIndex, killIdx, ValNum); LiveRange LR(defIndex, killIdx, ValNum);
interval.addRange(LR); interval.addRange(LR);
DEBUG(std::cerr << " +" << LR << "\n"); DOUT << " +" << LR << "\n";
return; return;
} }
} }
@ -497,7 +498,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
LiveRange NewLR(defIndex, LiveRange NewLR(defIndex,
getInstructionIndex(&mbb->back()) + InstrSlots::NUM, getInstructionIndex(&mbb->back()) + InstrSlots::NUM,
ValNum); ValNum);
DEBUG(std::cerr << " +" << NewLR); DOUT << " +" << NewLR;
interval.addRange(NewLR); interval.addRange(NewLR);
// Iterate over all of the blocks that the variable is completely // Iterate over all of the blocks that the variable is completely
@ -511,7 +512,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
getInstructionIndex(&MBB->back()) + InstrSlots::NUM, getInstructionIndex(&MBB->back()) + InstrSlots::NUM,
ValNum); ValNum);
interval.addRange(LR); interval.addRange(LR);
DEBUG(std::cerr << " +" << LR); DOUT << " +" << LR;
} }
} }
} }
@ -524,7 +525,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
getUseIndex(getInstructionIndex(Kill))+1, getUseIndex(getInstructionIndex(Kill))+1,
ValNum); ValNum);
interval.addRange(LR); interval.addRange(LR);
DEBUG(std::cerr << " +" << LR); DOUT << " +" << LR;
} }
} else { } else {
@ -559,7 +560,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
// Add the new live interval which replaces the range for the input copy. // Add the new live interval which replaces the range for the input copy.
LiveRange LR(DefIndex, RedefIndex, ValNo); LiveRange LR(DefIndex, RedefIndex, ValNo);
DEBUG(std::cerr << " replace range with " << LR); DOUT << " replace range with " << LR;
interval.addRange(LR); interval.addRange(LR);
// If this redefinition is dead, we need to add a dummy unit live // If this redefinition is dead, we need to add a dummy unit live
@ -567,7 +568,8 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
if (lv_->RegisterDefIsDead(mi, interval.reg)) if (lv_->RegisterDefIsDead(mi, interval.reg))
interval.addRange(LiveRange(RedefIndex, RedefIndex+1, 0)); interval.addRange(LiveRange(RedefIndex, RedefIndex+1, 0));
DEBUG(std::cerr << "RESULT: "; interval.print(std::cerr, mri_)); DOUT << "RESULT: ";
interval.print(DOUT, mri_);
} else { } else {
// Otherwise, this must be because of phi elimination. If this is the // Otherwise, this must be because of phi elimination. If this is the
@ -581,17 +583,17 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
MachineInstr *Killer = vi.Kills[0]; MachineInstr *Killer = vi.Kills[0];
unsigned Start = getMBBStartIdx(Killer->getParent()); unsigned Start = getMBBStartIdx(Killer->getParent());
unsigned End = getUseIndex(getInstructionIndex(Killer))+1; unsigned End = getUseIndex(getInstructionIndex(Killer))+1;
DEBUG(std::cerr << "Removing [" << Start << "," << End << "] from: "; DOUT << "Removing [" << Start << "," << End << "] from: ";
interval.print(std::cerr, mri_); std::cerr << "\n"); interval.print(DOUT, mri_); DOUT << "\n";
interval.removeRange(Start, End); interval.removeRange(Start, End);
DEBUG(std::cerr << "RESULT: "; interval.print(std::cerr, mri_)); DOUT << "RESULT: "; interval.print(DOUT, mri_);
// Replace the interval with one of a NEW value number. Note that this // Replace the interval with one of a NEW value number. Note that this
// value number isn't actually defined by an instruction, weird huh? :) // value number isn't actually defined by an instruction, weird huh? :)
LiveRange LR(Start, End, interval.getNextValue(~0U, 0)); LiveRange LR(Start, End, interval.getNextValue(~0U, 0));
DEBUG(std::cerr << " replace range with " << LR); DOUT << " replace range with " << LR;
interval.addRange(LR); interval.addRange(LR);
DEBUG(std::cerr << "RESULT: "; interval.print(std::cerr, mri_)); DOUT << "RESULT: "; interval.print(DOUT, mri_);
} }
// In the case of PHI elimination, each variable definition is only // In the case of PHI elimination, each variable definition is only
@ -609,11 +611,11 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
LiveRange LR(defIndex, LiveRange LR(defIndex,
getInstructionIndex(&mbb->back()) + InstrSlots::NUM, ValNum); getInstructionIndex(&mbb->back()) + InstrSlots::NUM, ValNum);
interval.addRange(LR); interval.addRange(LR);
DEBUG(std::cerr << " +" << LR); DOUT << " +" << LR;
} }
} }
DEBUG(std::cerr << '\n'); DOUT << '\n';
} }
void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB, void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
@ -623,7 +625,7 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
unsigned SrcReg) { unsigned SrcReg) {
// A physical register cannot be live across basic block, so its // A physical register cannot be live across basic block, so its
// lifetime must end somewhere in its defining basic block. // lifetime must end somewhere in its defining basic block.
DEBUG(std::cerr << "\t\tregister: "; printRegName(interval.reg)); DOUT << "\t\tregister: "; DEBUG(printRegName(interval.reg));
unsigned baseIndex = MIIdx; unsigned baseIndex = MIIdx;
unsigned start = getDefIndex(baseIndex); unsigned start = getDefIndex(baseIndex);
@ -633,7 +635,7 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
// the instruction defining it. Hence its interval is: // the instruction defining it. Hence its interval is:
// [defSlot(def), defSlot(def)+1) // [defSlot(def), defSlot(def)+1)
if (lv_->RegisterDefIsDead(mi, interval.reg)) { if (lv_->RegisterDefIsDead(mi, interval.reg)) {
DEBUG(std::cerr << " dead"); DOUT << " dead";
end = getDefIndex(start) + 1; end = getDefIndex(start) + 1;
goto exit; goto exit;
} }
@ -644,7 +646,7 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
while (++mi != MBB->end()) { while (++mi != MBB->end()) {
baseIndex += InstrSlots::NUM; baseIndex += InstrSlots::NUM;
if (lv_->KillsRegister(mi, interval.reg)) { if (lv_->KillsRegister(mi, interval.reg)) {
DEBUG(std::cerr << " killed"); DOUT << " killed";
end = getUseIndex(baseIndex) + 1; end = getUseIndex(baseIndex) + 1;
goto exit; goto exit;
} else if (lv_->ModifiesRegister(mi, interval.reg)) { } else if (lv_->ModifiesRegister(mi, interval.reg)) {
@ -652,7 +654,7 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
// Then the register is essentially dead at the instruction that defines // Then the register is essentially dead at the instruction that defines
// it. Hence its interval is: // it. Hence its interval is:
// [defSlot(def), defSlot(def)+1) // [defSlot(def), defSlot(def)+1)
DEBUG(std::cerr << " dead"); DOUT << " dead";
end = getDefIndex(start) + 1; end = getDefIndex(start) + 1;
goto exit; goto exit;
} }
@ -670,7 +672,7 @@ exit:
LiveRange LR(start, end, interval.getNextValue(SrcReg != 0 ? start : ~0U, LiveRange LR(start, end, interval.getNextValue(SrcReg != 0 ? start : ~0U,
SrcReg)); SrcReg));
interval.addRange(LR); interval.addRange(LR);
DEBUG(std::cerr << " +" << LR << '\n'); DOUT << " +" << LR << '\n';
} }
void LiveIntervals::handleRegisterDef(MachineBasicBlock *MBB, void LiveIntervals::handleRegisterDef(MachineBasicBlock *MBB,
@ -694,9 +696,9 @@ void LiveIntervals::handleRegisterDef(MachineBasicBlock *MBB,
/// live interval is an interval [i, j) where 1 <= i <= j < N for /// live interval is an interval [i, j) where 1 <= i <= j < N for
/// which a variable is live /// which a variable is live
void LiveIntervals::computeIntervals() { void LiveIntervals::computeIntervals() {
DEBUG(std::cerr << "********** COMPUTING LIVE INTERVALS **********\n"); DOUT << "********** COMPUTING LIVE INTERVALS **********\n"
DEBUG(std::cerr << "********** Function: " << "********** Function: "
<< ((Value*)mf_->getFunction())->getName() << '\n'); << ((Value*)mf_->getFunction())->getName() << '\n';
bool IgnoreFirstInstr = mf_->livein_begin() != mf_->livein_end(); bool IgnoreFirstInstr = mf_->livein_begin() != mf_->livein_end();
// Track the index of the current machine instr. // Track the index of the current machine instr.
@ -704,7 +706,7 @@ void LiveIntervals::computeIntervals() {
for (MachineFunction::iterator MBBI = mf_->begin(), E = mf_->end(); for (MachineFunction::iterator MBBI = mf_->begin(), E = mf_->end();
MBBI != E; ++MBBI) { MBBI != E; ++MBBI) {
MachineBasicBlock *MBB = MBBI; MachineBasicBlock *MBB = MBBI;
DEBUG(std::cerr << ((Value*)MBB->getBasicBlock())->getName() << ":\n"); DOUT << ((Value*)MBB->getBasicBlock())->getName() << ":\n";
MachineBasicBlock::iterator MI = MBB->begin(), miEnd = MBB->end(); MachineBasicBlock::iterator MI = MBB->begin(), miEnd = MBB->end();
if (IgnoreFirstInstr) { if (IgnoreFirstInstr) {
@ -714,7 +716,7 @@ void LiveIntervals::computeIntervals() {
} }
for (; MI != miEnd; ++MI) { for (; MI != miEnd; ++MI) {
DEBUG(std::cerr << MIIndex << "\t" << *MI); DOUT << MIIndex << "\t" << *MI;
// Handle defs. // Handle defs.
for (int i = MI->getNumOperands() - 1; i >= 0; --i) { for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
@ -792,7 +794,7 @@ bool LiveIntervals::AdjustCopiesBackFrom(LiveInterval &IntA, LiveInterval &IntB,
// IntB, we can merge them. // IntB, we can merge them.
if (ValLR+1 != BLR) return false; if (ValLR+1 != BLR) return false;
DEBUG(std::cerr << "\nExtending: "; IntB.print(std::cerr, mri_)); DOUT << "\nExtending: "; IntB.print(DOUT, mri_);
// We are about to delete CopyMI, so need to remove it as the 'instruction // We are about to delete CopyMI, so need to remove it as the 'instruction
// that defines this value #'. // that defines this value #'.
@ -817,8 +819,8 @@ bool LiveIntervals::AdjustCopiesBackFrom(LiveInterval &IntA, LiveInterval &IntB,
// Okay, merge "B1" into the same value number as "B0". // Okay, merge "B1" into the same value number as "B0".
if (BValNo != ValLR->ValId) if (BValNo != ValLR->ValId)
IntB.MergeValueNumberInto(BValNo, ValLR->ValId); IntB.MergeValueNumberInto(BValNo, ValLR->ValId);
DEBUG(std::cerr << " result = "; IntB.print(std::cerr, mri_); DOUT << " result = "; IntB.print(DOUT, mri_);
std::cerr << "\n"); DOUT << "\n";
// Finally, delete the copy instruction. // Finally, delete the copy instruction.
RemoveMachineInstrFromMaps(CopyMI); RemoveMachineInstrFromMaps(CopyMI);
@ -836,9 +838,7 @@ bool LiveIntervals::AdjustCopiesBackFrom(LiveInterval &IntA, LiveInterval &IntB,
/// it may be possible if other things get coallesced. /// it may be possible if other things get coallesced.
bool LiveIntervals::JoinCopy(MachineInstr *CopyMI, bool LiveIntervals::JoinCopy(MachineInstr *CopyMI,
unsigned SrcReg, unsigned DstReg) { unsigned SrcReg, unsigned DstReg) {
DOUT << getInstructionIndex(CopyMI) << '\t' << *CopyMI;
DEBUG(std::cerr << getInstructionIndex(CopyMI) << '\t' << *CopyMI);
// Get representative registers. // Get representative registers.
SrcReg = rep(SrcReg); SrcReg = rep(SrcReg);
@ -846,30 +846,30 @@ bool LiveIntervals::JoinCopy(MachineInstr *CopyMI,
// If they are already joined we continue. // If they are already joined we continue.
if (SrcReg == DstReg) { if (SrcReg == DstReg) {
DEBUG(std::cerr << "\tCopy already coallesced.\n"); DOUT << "\tCopy already coallesced.\n";
return true; // Not coallescable. return true; // Not coallescable.
} }
// If they are both physical registers, we cannot join them. // If they are both physical registers, we cannot join them.
if (MRegisterInfo::isPhysicalRegister(SrcReg) && if (MRegisterInfo::isPhysicalRegister(SrcReg) &&
MRegisterInfo::isPhysicalRegister(DstReg)) { MRegisterInfo::isPhysicalRegister(DstReg)) {
DEBUG(std::cerr << "\tCan not coallesce physregs.\n"); DOUT << "\tCan not coallesce physregs.\n";
return true; // Not coallescable. return true; // Not coallescable.
} }
// We only join virtual registers with allocatable physical registers. // We only join virtual registers with allocatable physical registers.
if (MRegisterInfo::isPhysicalRegister(SrcReg) && !allocatableRegs_[SrcReg]){ if (MRegisterInfo::isPhysicalRegister(SrcReg) && !allocatableRegs_[SrcReg]){
DEBUG(std::cerr << "\tSrc reg is unallocatable physreg.\n"); DOUT << "\tSrc reg is unallocatable physreg.\n";
return true; // Not coallescable. return true; // Not coallescable.
} }
if (MRegisterInfo::isPhysicalRegister(DstReg) && !allocatableRegs_[DstReg]){ if (MRegisterInfo::isPhysicalRegister(DstReg) && !allocatableRegs_[DstReg]){
DEBUG(std::cerr << "\tDst reg is unallocatable physreg.\n"); DOUT << "\tDst reg is unallocatable physreg.\n";
return true; // Not coallescable. return true; // Not coallescable.
} }
// If they are not of the same register class, we cannot join them. // If they are not of the same register class, we cannot join them.
if (differingRegisterClasses(SrcReg, DstReg)) { if (differingRegisterClasses(SrcReg, DstReg)) {
DEBUG(std::cerr << "\tSrc/Dest are different register classes.\n"); DOUT << "\tSrc/Dest are different register classes.\n";
return true; // Not coallescable. return true; // Not coallescable.
} }
@ -878,9 +878,9 @@ bool LiveIntervals::JoinCopy(MachineInstr *CopyMI,
assert(SrcInt.reg == SrcReg && DestInt.reg == DstReg && assert(SrcInt.reg == SrcReg && DestInt.reg == DstReg &&
"Register mapping is horribly broken!"); "Register mapping is horribly broken!");
DEBUG(std::cerr << "\t\tInspecting "; SrcInt.print(std::cerr, mri_); DOUT << "\t\tInspecting "; SrcInt.print(DOUT, mri_);
std::cerr << " and "; DestInt.print(std::cerr, mri_); DOUT << " and "; DestInt.print(DOUT, mri_);
std::cerr << ": "); DOUT << ": ";
// Okay, attempt to join these two intervals. On failure, this returns false. // Okay, attempt to join these two intervals. On failure, this returns false.
// Otherwise, if one of the intervals being joined is a physreg, this method // Otherwise, if one of the intervals being joined is a physreg, this method
@ -894,7 +894,7 @@ bool LiveIntervals::JoinCopy(MachineInstr *CopyMI,
return true; return true;
// Otherwise, we are unable to join the intervals. // Otherwise, we are unable to join the intervals.
DEBUG(std::cerr << "Interference!\n"); DOUT << "Interference!\n";
return false; return false;
} }
@ -912,8 +912,8 @@ bool LiveIntervals::JoinCopy(MachineInstr *CopyMI,
getInterval(*AS).MergeInClobberRanges(SrcInt); getInterval(*AS).MergeInClobberRanges(SrcInt);
} }
DEBUG(std::cerr << "\n\t\tJoined. Result = "; DestInt.print(std::cerr, mri_); DOUT << "\n\t\tJoined. Result = "; DestInt.print(DOUT, mri_);
std::cerr << "\n"); DOUT << "\n";
// If the intervals were swapped by Join, swap them back so that the register // If the intervals were swapped by Join, swap them back so that the register
// mapping (in the r2i map) is correct. // mapping (in the r2i map) is correct.
@ -1314,7 +1314,7 @@ namespace {
void LiveIntervals::CopyCoallesceInMBB(MachineBasicBlock *MBB, void LiveIntervals::CopyCoallesceInMBB(MachineBasicBlock *MBB,
std::vector<CopyRec> &TryAgain) { std::vector<CopyRec> &TryAgain) {
DEBUG(std::cerr << ((Value*)MBB->getBasicBlock())->getName() << ":\n"); DOUT << ((Value*)MBB->getBasicBlock())->getName() << ":\n";
for (MachineBasicBlock::iterator MII = MBB->begin(), E = MBB->end(); for (MachineBasicBlock::iterator MII = MBB->begin(), E = MBB->end();
MII != E;) { MII != E;) {
@ -1331,7 +1331,7 @@ void LiveIntervals::CopyCoallesceInMBB(MachineBasicBlock *MBB,
void LiveIntervals::joinIntervals() { void LiveIntervals::joinIntervals() {
DEBUG(std::cerr << "********** JOINING INTERVALS ***********\n"); DOUT << "********** JOINING INTERVALS ***********\n";
std::vector<CopyRec> TryAgainList; std::vector<CopyRec> TryAgainList;
@ -1374,13 +1374,13 @@ void LiveIntervals::joinIntervals() {
} }
} }
DEBUG(std::cerr << "*** Register mapping ***\n"); DOUT << "*** Register mapping ***\n";
DEBUG(for (int i = 0, e = r2rMap_.size(); i != e; ++i) for (int i = 0, e = r2rMap_.size(); i != e; ++i)
if (r2rMap_[i]) { if (r2rMap_[i]) {
std::cerr << " reg " << i << " -> "; DOUT << " reg " << i << " -> ";
printRegName(r2rMap_[i]); DEBUG(printRegName(r2rMap_[i]));
std::cerr << "\n"; DOUT << "\n";
}); }
} }
/// Return true if the two specified registers belong to different register /// Return true if the two specified registers belong to different register