6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-07-23 14:25:07 +00:00
Code Issues Projects Releases Wiki Activity

Minor spiller tweak to unfavor reload into load/store instructions.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52477 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2008-06-19 01:16:17 +00:00
parent 6c5e561668
commit bdf34bc12b
3 changed files with 21 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
include/llvm/CodeGen/LiveIntervalAnalysis.h
View File

@@ -121,8 +121,12 @@ namespace llvm {
return getBaseIndex(index) + InstrSlots::STORE;
}
static float getSpillWeight(bool isDef, bool isUse, unsigned loopDepth) {
return (isDef + isUse) * powf(10.0F, (float)loopDepth);
static float getSpillWeight(bool isDef, bool isUse, bool isMem,
unsigned loopDepth) {
float Weight = isDef;
if (isUse)
Weight += isMem ? 1.2f : 1.0f;
return Weight * powf(10.0F, (float)loopDepth);
}
typedef Reg2IntervalMap::iterator iterator;

7
include/llvm/CodeGen/MachineRegisterInfo.h
View File

@@ -135,6 +135,13 @@ public:
assert(Reg < VRegInfo.size() && "Invalid vreg!");
return VRegInfo[Reg].first;
}
/// setRegClass - Set the register class of the specified virtual register.
void setRegClass(unsigned Reg, const TargetRegisterClass *RC) {
Reg -= TargetRegisterInfo::FirstVirtualRegister;
assert(Reg < VRegInfo.size() && "Invalid vreg!");
VRegInfo[Reg].first = RC;
}
/// createVirtualRegister - Create and return a new virtual register in the
/// function with the specified register class.