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Don't reserve the R0 and R1 registers here. We don't use these registers, and
marking them as "live-in" into a BB ruins some invariants that the back-end tries to maintain. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150437 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1851,6 +1851,12 @@ void SelectionDAGBuilder::visitLandingPad(const LandingPadInst &LP) {
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MachineModuleInfo &MMI = DAG.getMachineFunction().getMMI();
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AddLandingPadInfo(LP, MMI, MBB);
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// If there aren't registers to copy the values into (e.g., during SjLj
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// exceptions), then don't bother to create these DAG nodes.
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if (TLI.getExceptionAddressRegister() == 0 &&
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TLI.getExceptionSelectorRegister() == 0)
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return;
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SmallVector<EVT, 2> ValueVTs;
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ComputeValueVTs(TLI, LP.getType(), ValueVTs);
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@ -647,10 +647,15 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
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setOperationAction(ISD::VAEND, MVT::Other, Expand);
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setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
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setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
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setOperationAction(ISD::EHSELECTION, MVT::i32, Expand);
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setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand);
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setExceptionPointerRegister(ARM::R0);
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setExceptionSelectorRegister(ARM::R1);
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if (!Subtarget->isTargetDarwin()) {
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// Non-Darwin platforms may return values in these registers via the
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// personality function.
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setOperationAction(ISD::EHSELECTION, MVT::i32, Expand);
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setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand);
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setExceptionPointerRegister(ARM::R0);
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setExceptionSelectorRegister(ARM::R1);
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}
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setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand);
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// ARMv6 Thumb1 (except for CPUs that support dmb / dsb) and earlier use
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