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Rely on instruction format to determine so_reg operand for now.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56181 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2008-09-13 01:38:29 +00:00
parent 05fc966401
commit be3034c288
1 changed files with 5 additions and 1 deletions
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6
lib/Target/ARM/ARMCodeEmitter.cpp
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@ -372,7 +372,11 @@ unsigned ARMCodeEmitter::getAddrMode1InstrBinary(const MachineInstr &MI,
}
// Encode shifter operand.
if (TID.getNumOperands() - OpIdx > 1)
bool HasSoReg = (Format == ARMII::DPRdSoReg ||
Format == ARMII::DPRnSoReg ||
Format == ARMII::DPRSoReg ||
Format == ARMII::DPRSoRegS);
if (HasSoReg)
// Encode SoReg.
return Binary | getMachineSoRegOpValue(MI, TID, OpIdx);