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fix a type mismatch in this pattern, where we were using an i64 imm in a
place where an i32 imm was required, the old isel just got lucky. This fixes CodeGen/X86/x86-64-and-mask.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96894 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -65,12 +65,18 @@ def i64immSExt8 : PatLeaf<(i64 imm), [{
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return (int64_t)N->getZExtValue() == (int8_t)N->getZExtValue();
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}]>;
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def GetLo32XForm : SDNodeXForm<imm, [{
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// Transformation function: get the low 32 bits.
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return getI32Imm((unsigned)N->getZExtValue());
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}]>;
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def i64immSExt32 : PatLeaf<(i64 imm), [{
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// i64immSExt32 predicate - True if the 64-bit immediate fits in a 32-bit
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// sign extended field.
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return (int64_t)N->getZExtValue() == (int32_t)N->getZExtValue();
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}]>;
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def i64immZExt32 : PatLeaf<(i64 imm), [{
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// i64immZExt32 predicate - True if the 64-bit immediate fits in a 32-bit
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// unsignedsign extended field.
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@ -1981,7 +1987,7 @@ def : Pat<(and GR64:$src, i64immZExt32:$imm),
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(i64 0),
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(AND32ri
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(EXTRACT_SUBREG GR64:$src, x86_subreg_32bit),
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imm:$imm),
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(i32 (GetLo32XForm imm:$imm))),
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x86_subreg_32bit)>;
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// r & (2^32-1) ==> movz
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