mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-13 20:32:21 +00:00
fix a type mismatch in this pattern, where we were using an i64 imm in a
place where an i32 imm was required, the old isel just got lucky. This fixes CodeGen/X86/x86-64-and-mask.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96894 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
53d09bd009
commit
be5ad7dce2
@ -65,12 +65,18 @@ def i64immSExt8 : PatLeaf<(i64 imm), [{
|
||||
return (int64_t)N->getZExtValue() == (int8_t)N->getZExtValue();
|
||||
}]>;
|
||||
|
||||
def GetLo32XForm : SDNodeXForm<imm, [{
|
||||
// Transformation function: get the low 32 bits.
|
||||
return getI32Imm((unsigned)N->getZExtValue());
|
||||
}]>;
|
||||
|
||||
def i64immSExt32 : PatLeaf<(i64 imm), [{
|
||||
// i64immSExt32 predicate - True if the 64-bit immediate fits in a 32-bit
|
||||
// sign extended field.
|
||||
return (int64_t)N->getZExtValue() == (int32_t)N->getZExtValue();
|
||||
}]>;
|
||||
|
||||
|
||||
def i64immZExt32 : PatLeaf<(i64 imm), [{
|
||||
// i64immZExt32 predicate - True if the 64-bit immediate fits in a 32-bit
|
||||
// unsignedsign extended field.
|
||||
@ -1981,7 +1987,7 @@ def : Pat<(and GR64:$src, i64immZExt32:$imm),
|
||||
(i64 0),
|
||||
(AND32ri
|
||||
(EXTRACT_SUBREG GR64:$src, x86_subreg_32bit),
|
||||
imm:$imm),
|
||||
(i32 (GetLo32XForm imm:$imm))),
|
||||
x86_subreg_32bit)>;
|
||||
|
||||
// r & (2^32-1) ==> movz
|
||||
|
Loading…
Reference in New Issue
Block a user