6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2026-04-21 08:17:40 +00:00
Code Issues Projects Releases Wiki Activity

Remove getAllocatedRegNum(). Use getReg() instead.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11393 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Alkis Evlogimenos
2004-02-13 21:01:20 +00:00
parent 903b22cd51
commit be766c7246
20 changed files with 49 additions and 54 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/CodeGen/RegAllocSimple.cpp
+4 -4
View File
@@ -173,7 +173,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
MachineOperand &op = MI->getOperand(i);
if (op.isRegister() && MRegisterInfo::isVirtualRegister(op.getReg())) {
unsigned virtualReg = (unsigned) op.getAllocatedRegNum();
unsigned virtualReg = (unsigned) op.getReg();
DEBUG(std::cerr << "op: " << op << "\n");
DEBUG(std::cerr << "\t inst[" << i << "]: ";
MI->print(std::cerr, *TM));
@@ -187,11 +187,11 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
// must be same register number as the first operand
// This maps a = b + c into b += c, and saves b into a's spot
assert(MI->getOperand(1).isRegister() &&
MI->getOperand(1).getAllocatedRegNum() &&
MI->getOperand(1).getReg() &&
MI->getOperand(1).isUse() &&
"Two address instruction invalid!");
physReg = MI->getOperand(1).getAllocatedRegNum();
physReg = MI->getOperand(1).getReg();
} else {
physReg = getFreeReg(virtualReg);
}
@@ -205,7 +205,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
}
MI->SetMachineOperandReg(i, physReg);
DEBUG(std::cerr << "virt: " << virtualReg <<
", phys: " << op.getAllocatedRegNum() << "\n");
", phys: " << op.getReg() << "\n");
}
}
RegClassIdx.clear();