From be7cf2b377d987f46d10f54f89ae4e1a71c37f55 Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Fri, 16 Mar 2012 20:48:38 +0000 Subject: [PATCH] ARM ldm/stm register lists can be out of order. It's not a good style idea, as the registers will be laid down in memory in numerical order, not the order they're in the list, but it's legal. vldm/vstm are stricter. rdar://11064740 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152943 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 8 ++++++-- test/MC/ARM/diagnostics.s | 2 +- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 29a9b0d844a..8f3bd6dffe0 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -2854,8 +2854,12 @@ parseRegisterList(SmallVectorImpl &Operands) { if (!RC->contains(Reg)) return Error(RegLoc, "invalid register in register list"); // List must be monotonically increasing. - if (getARMRegisterNumbering(Reg) < getARMRegisterNumbering(OldReg)) - return Error(RegLoc, "register list not in ascending order"); + if (getARMRegisterNumbering(Reg) < getARMRegisterNumbering(OldReg)) { + if (ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Reg)) + Warning(RegLoc, "register list not in ascending order"); + else + return Error(RegLoc, "register list not in ascending order"); + } if (getARMRegisterNumbering(Reg) == getARMRegisterNumbering(OldReg)) { Warning(RegLoc, "duplicated register (" + RegTok.getString() + ") in register list"); diff --git a/test/MC/ARM/diagnostics.s b/test/MC/ARM/diagnostics.s index f722dd7c070..7da79c31dc3 100644 --- a/test/MC/ARM/diagnostics.s +++ b/test/MC/ARM/diagnostics.s @@ -216,7 +216,7 @@ @ Out of order STM registers stmda sp!, {r5, r2} -@ CHECK-ERRORS: error: register list not in ascending order +@ CHECK-ERRORS: warning: register list not in ascending order @ CHECK-ERRORS: stmda sp!, {r5, r2} @ CHECK-ERRORS: ^