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Reapply piecies of r112942 and r112934 which don't do

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functional changes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113007 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes 2010-09-03 20:10:35 +00:00
parent b3e0669b8e
commit be8b084d8a
1 changed files with 36 additions and 0 deletions
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36
lib/Target/X86/X86ISelLowering.cpp
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@ -2602,13 +2602,17 @@ static bool isTargetShuffle(unsigned Opcode) {
case X86ISD::MOVSS: case X86ISD::MOVSS:
case X86ISD::MOVSD: case X86ISD::MOVSD:
case X86ISD::UNPCKLPS: case X86ISD::UNPCKLPS:
case X86ISD::UNPCKLPD:
case X86ISD::PUNPCKLWD: case X86ISD::PUNPCKLWD:
case X86ISD::PUNPCKLBW: case X86ISD::PUNPCKLBW:
case X86ISD::PUNPCKLDQ: case X86ISD::PUNPCKLDQ:
case X86ISD::PUNPCKLQDQ:
case X86ISD::UNPCKHPS: case X86ISD::UNPCKHPS:
case X86ISD::UNPCKHPD:
case X86ISD::PUNPCKHWD: case X86ISD::PUNPCKHWD:
case X86ISD::PUNPCKHBW: case X86ISD::PUNPCKHBW:
case X86ISD::PUNPCKHDQ: case X86ISD::PUNPCKHDQ:
case X86ISD::PUNPCKHQDQ:
return true; return true;
} }
return false; return false;
@ -2663,13 +2667,17 @@ static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT,
case X86ISD::MOVSS: case X86ISD::MOVSS:
case X86ISD::MOVSD: case X86ISD::MOVSD:
case X86ISD::UNPCKLPS: case X86ISD::UNPCKLPS:
case X86ISD::UNPCKLPD:
case X86ISD::PUNPCKLWD: case X86ISD::PUNPCKLWD:
case X86ISD::PUNPCKLBW: case X86ISD::PUNPCKLBW:
case X86ISD::PUNPCKLDQ: case X86ISD::PUNPCKLDQ:
case X86ISD::PUNPCKLQDQ:
case X86ISD::UNPCKHPS: case X86ISD::UNPCKHPS:
case X86ISD::UNPCKHPD:
case X86ISD::PUNPCKHWD: case X86ISD::PUNPCKHWD:
case X86ISD::PUNPCKHBW: case X86ISD::PUNPCKHBW:
case X86ISD::PUNPCKHDQ: case X86ISD::PUNPCKHDQ:
case X86ISD::PUNPCKHQDQ:
return DAG.getNode(Opc, dl, VT, V1, V2); return DAG.getNode(Opc, dl, VT, V1, V2);
} }
return SDValue(); return SDValue();
@ -5142,6 +5150,34 @@ SDValue getMOVLP(SDValue &Op, DebugLoc &dl, SelectionDAG &DAG, bool HasSSE2) {
X86::getShuffleSHUFImmediate(SVOp), DAG); X86::getShuffleSHUFImmediate(SVOp), DAG);
} }
static inline unsigned getUNPCKLOpcode(EVT VT) {
switch(VT.getSimpleVT().SimpleTy) {
case MVT::v4i32: return X86ISD::PUNPCKLDQ;
case MVT::v2i64: return X86ISD::PUNPCKLQDQ;
case MVT::v4f32: return X86ISD::UNPCKLPS;
case MVT::v2f64: return X86ISD::UNPCKLPD;
case MVT::v16i8: return X86ISD::PUNPCKLBW;
case MVT::v8i16: return X86ISD::PUNPCKLWD;
default:
llvm_unreachable("Unknow type for unpckl");
}
return 0;
}
static inline unsigned getUNPCKHOpcode(EVT VT) {
switch(VT.getSimpleVT().SimpleTy) {
case MVT::v4i32: return X86ISD::PUNPCKHDQ;
case MVT::v2i64: return X86ISD::PUNPCKHQDQ;
case MVT::v4f32: return X86ISD::UNPCKHPS;
case MVT::v2f64: return X86ISD::UNPCKHPD;
case MVT::v16i8: return X86ISD::PUNPCKHBW;
case MVT::v8i16: return X86ISD::PUNPCKHWD;
default:
llvm_unreachable("Unknow type for unpckh");
}
return 0;
}
SDValue SDValue
X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const { X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const {
ShuffleVectorSDNode *SVOp = cast<ShuffleVectorSDNode>(Op); ShuffleVectorSDNode *SVOp = cast<ShuffleVectorSDNode>(Op);