Factory methods for function passes now return type FunctionPass *.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7839 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/CodeGen/InstrScheduling.h

@@ -8,7 +8,7 @@
 #ifndef LLVM_CODEGEN_INSTR_SCHEDULING_H
 #define LLVM_CODEGEN_INSTR_SCHEDULING_H
 
-class Pass;
+class FunctionPass;
 class TargetMachine;
 
 //---------------------------------------------------------------------------
@@ -21,6 +21,6 @@ class TargetMachine;
 //   are still in SSA form.
 //---------------------------------------------------------------------------
 
-Pass *createInstructionSchedulingWithSSAPass(const TargetMachine &Target);
+FunctionPass *createInstructionSchedulingWithSSAPass(const TargetMachine &Target);
 
 #endif

include/llvm/CodeGen/InstrSelection.h

@@ -15,7 +15,7 @@ class MachineInstr;
 class InstructionNode;
 class TargetMachine;
 class MachineCodeForInstruction;
-class Pass;
+class FunctionPass;
 
 //===--------------------- Required Functions ---------------------------------
 // Target-dependent functions that MUST be implemented for each target.
@@ -43,7 +43,7 @@ extern bool	ThisIsAChainRule	(int eruleno);
 //   Return a pass that performs machine dependant instruction selection.
 //---------------------------------------------------------------------------
 
-Pass *createInstructionSelectionPass(TargetMachine &Target);
+FunctionPass *createInstructionSelectionPass(TargetMachine &Target);
 
 
 //************************ Exported Data Types *****************************/

include/llvm/CodeGen/PeepholeOpts.h

@@ -8,8 +8,8 @@
 #define LLVM_CODEGEN_PEEPHOLE_OPTS_H
 
 class TargetMachine;
-class Pass;
+class FunctionPass;
 
-Pass *createPeepholeOptsPass(TargetMachine &Target);
+FunctionPass *createPeepholeOptsPass(TargetMachine &Target);
 
 #endif

include/llvm/CodeGen/RegisterAllocation.h

@@ -7,13 +7,13 @@
 #ifndef LLVM_CODEGEN_REGISTERALLOCATION_H
 #define LLVM_CODEGEN_REGISTERALLOCATION_H
 
-class Pass;
+class FunctionPass;
 class TargetMachine;
 
 //----------------------------------------------------------------------------
 // Entry point for register allocation for a module
 //----------------------------------------------------------------------------
 
-Pass *getRegisterAllocator(TargetMachine &T);
+FunctionPass *getRegisterAllocator(TargetMachine &T);
 
 #endif

include/llvm/Transforms/Scalar.h

@@ -72,7 +72,7 @@ Pass *createScalarReplAggregatesPass();
 // index of [0]).
 
 // This pass decomposes all multi-dimensional references in a function.
-Pass *createDecomposeMultiDimRefsPass();
+FunctionPass *createDecomposeMultiDimRefsPass();
 
 // This function decomposes a single instance of such a reference.
 // Return value: true if the instruction was replaced; false otherwise.
@@ -238,7 +238,7 @@ extern const PassInfo *LoopPreheadersID;
 // These two passes convert malloc and free instructions to and from %malloc &
 // %free function calls.
 //
-Pass *createLowerAllocationsPass();
+FunctionPass *createLowerAllocationsPass();
 Pass *createRaiseAllocationsPass();
 
 //===----------------------------------------------------------------------===//

lib/CodeGen/InstrSched/InstrScheduling.cpp

@@ -1491,6 +1491,6 @@ bool InstructionSchedulingWithSSA::runOnFunction(Function &F)
 }
 
 
-Pass *createInstructionSchedulingWithSSAPass(const TargetMachine &tgt) {
+FunctionPass *createInstructionSchedulingWithSSAPass(const TargetMachine &tgt) {
   return new InstructionSchedulingWithSSA(tgt);
 }

lib/CodeGen/RegAlloc/PhyRegAlloc.cpp

@@ -74,7 +74,7 @@ namespace {
   };
 }
 
-Pass *getRegisterAllocator(TargetMachine &T) {
+FunctionPass *getRegisterAllocator(TargetMachine &T) {
   return new RegisterAllocator(T);
 }
 

lib/Target/SparcV9/InstrSched/InstrScheduling.cpp

@@ -1491,6 +1491,6 @@ bool InstructionSchedulingWithSSA::runOnFunction(Function &F)
 }
 
 
-Pass *createInstructionSchedulingWithSSAPass(const TargetMachine &tgt) {
+FunctionPass *createInstructionSchedulingWithSSAPass(const TargetMachine &tgt) {
   return new InstructionSchedulingWithSSA(tgt);
 }

lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp

@@ -74,7 +74,7 @@ namespace {
   };
 }
 
-Pass *getRegisterAllocator(TargetMachine &T) {
+FunctionPass *getRegisterAllocator(TargetMachine &T) {
   return new RegisterAllocator(T);
 }
 

lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp

@@ -167,6 +167,6 @@ void InsertPrologEpilogCode::InsertEpilogCode(MachineFunction &MF)
   }
 }
 
-Pass* UltraSparc::getPrologEpilogInsertionPass() {
+FunctionPass *UltraSparc::getPrologEpilogInsertionPass() {
   return new InsertPrologEpilogCode();
 }

lib/Transforms/Scalar/DecomposeMultiDimRefs.cpp

@@ -29,7 +29,7 @@ namespace {
 RegisterOpt<DecomposePass> X("lowerrefs", "Decompose multi-dimensional "
                              "structure/array references");
 
-Pass
+FunctionPass
 *createDecomposeMultiDimRefsPass()
 {
   return new DecomposePass();

lib/Transforms/Utils/LowerAllocations.cpp

@@ -47,7 +47,7 @@ namespace {
 }
 
 // createLowerAllocationsPass - Interface to this file...
-Pass *createLowerAllocationsPass() {
+FunctionPass *createLowerAllocationsPass() {
   return new LowerAllocations();
 }