diff --git a/lib/Target/SparcV9/SparcV9RegClassInfo.h b/lib/Target/SparcV9/SparcV9RegClassInfo.h index fd768157500..0a5f5169d16 100644 --- a/lib/Target/SparcV9/SparcV9RegClassInfo.h +++ b/lib/Target/SparcV9/SparcV9RegClassInfo.h @@ -15,7 +15,6 @@ // Integer Register Class //----------------------------------------------------------------------------- - // Int register names in same order as enum in class SparcIntRegOrder static string const IntRegNames[] = @@ -38,7 +37,7 @@ class SparcIntRegOrder{ // --- following colors are volatile across function calls // %g0 can't be used for coloring - always 0 - //%g1-%g5 (g6-7 are reserved for system) + o0, o1, o2, o3, o4, o5, o7, // %o0-%o5, // %o6 is sp, @@ -59,9 +58,12 @@ class SparcIntRegOrder{ i6, i7, g0, g1, g2, g3, g4, g5, g6, g7, o6 - //*** NOTE: If we decide to use globals, some of them are volatile - //**** see sparc64ABI (change isRegVloatile method below) - + //*** NOTE: If we decide to use some %g regs, they are volatile + // (see sparc64ABI) + // Move the %g regs from the end of the enumeration to just above the + // enumeration of %o0 (change StartOfAllRegs below) + // change isRegVloatile method below + // Also change IntRegNames above. }; @@ -110,6 +112,9 @@ class SparcIntRegClass : public MachineRegClassInfo }; + + + //----------------------------------------------------------------------------- // Float Register Class //----------------------------------------------------------------------------- @@ -158,7 +163,6 @@ class SparcFloatRegOrder{ } - }; @@ -219,10 +223,6 @@ class SparcIntCCRegOrder{ return IntCCRegNames[reg]; } - // according to Sparc 64 ABI, %ccr is volatile - inline bool isRegVolatile(const int Reg) const { return true; } - - }; @@ -238,13 +238,15 @@ public: Node->setColor(0); // only one int cc reg is available } - + // according to Sparc 64 ABI, %ccr is volatile + // inline bool isRegVolatile(const int Reg) const { return true; } }; + //----------------------------------------------------------------------------- // Float CC Register Class // Only 4 Float CC registers are available @@ -271,10 +273,6 @@ class SparcFloatCCRegOrder{ return FloatCCRegNames[reg]; } - // according to Sparc 64 ABI, all %fp regs are volatile - inline bool isRegVolatile(const int Reg) const { return true; } - - }; @@ -293,7 +291,9 @@ public: Node->setColor(c); } - // *** TODO: Check this + + // according to Sparc 64 ABI, all %fp CC regs are volatile + // inline bool isRegVolatile(const int Reg) const { return true; } diff --git a/lib/Target/SparcV9/SparcV9RegInfo.cpp b/lib/Target/SparcV9/SparcV9RegInfo.cpp index 6a0460de741..65433979572 100644 --- a/lib/Target/SparcV9/SparcV9RegInfo.cpp +++ b/lib/Target/SparcV9/SparcV9RegInfo.cpp @@ -1161,31 +1161,28 @@ MachineInstr * UltraSparcRegInfo::cpValue2Value(Value *Src, Value *Dest) const{ //---------------------------------------------------------------------------- // This method inserts caller saving/restoring instructons before/after -// a call machine instruction. +// a call machine instruction. The caller saving/restoring instructions are +// inserted like: +// +// ** caller saving instructions +// other instructions inserted for the call by ColorCallArg +// CALL instruction +// other instructions inserted for the call ColorCallArg +// ** caller restoring instructions +// //---------------------------------------------------------------------------- void UltraSparcRegInfo::insertCallerSavingCode(const MachineInstr *MInst, const BasicBlock *BB, PhyRegAlloc &PRA) const { - // assert( (getInstrInfo()).isCall( MInst->getOpCode() ) ); - - // Clear the temp area of the stack - //PRA.mcInfo.popAllTempValues(target); - // TODO*** Don't do this since we can have a situation like - /* - - stx %o1 %i6 1999 <--- inserted by this code - stx %o5 %i6 2007 - - ***** - stx %o1 %i6 2007 ???? <-- inserted by statck2stack call arg - - */ - + // has set to record which registers were saved/restored + // hash_set PushedRegSet; + + // Now find the LR of the return value of the call // The last *implicit operand* is the return value of a call // Insert it to to he PushedRegSet since we must not save that register @@ -1350,11 +1347,6 @@ void UltraSparcRegInfo::insertCallerSavingCode(const MachineInstr *MInst, } // for each value in the LV set after instruction - // Clear the temp area of the stack - // PRA.mcInfo.popAllTempValues(target); - // TODO *** see above call - optimize later - - } //---------------------------------------------------------------------------