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Fix typos

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202107 91177308-0d34-0410-b5e6-96231b3b80d8
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Alp Toker
2014-02-25 04:21:15 +00:00
parent eb1b5ba880
commit bf930d5c1f
4 changed files with 6 additions and 6 deletions
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lib/CodeGen/RegAllocGreedy.cpp
+1 -1
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@@ -1916,7 +1916,7 @@ RAGreedy::mayRecolorAllInterferences(unsigned PhysReg, LiveInterval &VirtReg,
/// R3 is available.
/// Recoloring => vC = R1, vA = R2, vB = R3
///
/// \p Order defines the prefered allocation order for \p VirtReg.
/// \p Order defines the preferred allocation order for \p VirtReg.
/// \p NewRegs will contain any new virtual register that have been created
/// (split, spill) during the process and that must be assigned.
/// \p FixedRegisters contains all the virtual registers that cannot be