6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-17 05:29:24 +00:00
Code Issues Projects Releases Wiki Activity

Use PassManagerBase instead of FunctionPassManager for functions

Browse Source 
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48256 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2008-03-11 22:29:46 +00:00
parent e846dd89c1
commit bfae83139d
25 changed files with 85 additions and 89 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
include/llvm/CodeGen/FileWriters.h
View File

@ -18,13 +18,13 @@
namespace llvm {
class FunctionPassManager;
class PassManagerBase;
class MachineCodeEmitter;
class TargetMachine;
MachineCodeEmitter *AddELFWriter(FunctionPassManager &FPM, std::ostream &O,
MachineCodeEmitter *AddELFWriter(PassManagerBase &FPM, std::ostream &O,
TargetMachine &TM);
MachineCodeEmitter *AddMachOWriter(FunctionPassManager &FPM, std::ostream &O,
MachineCodeEmitter *AddMachOWriter(PassManagerBase &FPM, std::ostream &O,
TargetMachine &TM);
} // end llvm namespace

1
include/llvm/Target/TargetJITInfo.h
View File

@ -23,7 +23,6 @@
namespace llvm {
class Function;
class FunctionPassManager;
class MachineBasicBlock;
class MachineCodeEmitter;
class MachineRelocation;

26
include/llvm/Target/TargetMachine.h
View File

@ -30,7 +30,7 @@ class TargetFrameInfo;
class MachineCodeEmitter;
class TargetRegisterInfo;
class Module;
class FunctionPassManager;
class PassManagerBase;
class PassManager;
class Pass;
class TargetMachOWriterInfo;
@ -195,7 +195,7 @@ public:
/// This method should return FileModel::Error if emission of this file type
/// is not supported.
///
virtual FileModel::Model addPassesToEmitFile(FunctionPassManager &PM,
virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
std::ostream &Out,
CodeGenFileType FileType,
bool Fast) {
@ -206,7 +206,7 @@ public:
/// to be split up (e.g., to add an object writer pass), this method can be
/// used to finish up adding passes to emit the file, if necessary.
///
virtual bool addPassesToEmitFileFinish(FunctionPassManager &PM,
virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
MachineCodeEmitter *MCE, bool Fast) {
return true;
}
@ -217,7 +217,7 @@ public:
/// of functions. This method returns true if machine code emission is
/// not supported.
///
virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
MachineCodeEmitter &MCE, bool Fast) {
return true;
}
@ -251,7 +251,7 @@ public:
/// LLVM retargetable code generator, invoking the methods below to get
/// target-specific passes in standard locations.
///
virtual FileModel::Model addPassesToEmitFile(FunctionPassManager &PM,
virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
std::ostream &Out,
CodeGenFileType FileType,
bool Fast);
@ -260,7 +260,7 @@ public:
/// to be split up (e.g., to add an object writer pass), this method can be
/// used to finish up adding passes to emit the file, if necessary.
///
virtual bool addPassesToEmitFileFinish(FunctionPassManager &PM,
virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
MachineCodeEmitter *MCE, bool Fast);
/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
@ -269,7 +269,7 @@ public:
/// of functions. This method returns true if machine code emission is
/// not supported.
///
virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
MachineCodeEmitter &MCE, bool Fast);
/// Target-Independent Code Generator Pass Configuration Options.
@ -277,7 +277,7 @@ public:
/// addInstSelector - This method should add any "last minute" LLVM->LLVM
/// passes, then install an instruction selector pass, which converts from
/// LLVM code to machine instructions.
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast) {
virtual bool addInstSelector(PassManagerBase &PM, bool Fast) {
return true;
}
@ -285,14 +285,14 @@ public:
/// want to run passes after register allocation but before prolog-epilog
/// insertion. This should return true if -print-machineinstrs should print
/// after these passes.
virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast) {
virtual bool addPostRegAlloc(PassManagerBase &PM, bool Fast) {
return false;
}
/// addPreEmitPass - This pass may be implemented by targets that want to run
/// passes immediately before machine code is emitted. This should return
/// true if -print-machineinstrs should print out the code after the passes.
virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast) {
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast) {
return false;
}
@ -300,7 +300,7 @@ public:
/// addAssemblyEmitter - This pass should be overridden by the target to add
/// the asmprinter, if asm emission is supported. If this is not supported,
/// 'true' should be returned.
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out) {
return true;
}
@ -308,7 +308,7 @@ public:
/// addCodeEmitter - This pass should be overridden by the target to add a
/// code emitter, if supported. If this is not supported, 'true' should be
/// returned. If DumpAsm is true, the generated assembly is printed to cerr.
virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast, bool DumpAsm,
virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast, bool DumpAsm,
MachineCodeEmitter &MCE) {
return true;
}
@ -317,7 +317,7 @@ public:
/// a code emitter (without setting flags), if supported. If this is not
/// supported, 'true' should be returned. If DumpAsm is true, the generated
/// assembly is printed to cerr.
virtual bool addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) {
return true;
}

4
lib/CodeGen/ELFWriter.cpp
View File

@ -50,11 +50,11 @@ using namespace llvm;
char ELFWriter::ID = 0;
/// AddELFWriter - Concrete function to add the ELF writer to the function pass
/// manager.
MachineCodeEmitter *llvm::AddELFWriter(FunctionPassManager &FPM,
MachineCodeEmitter *llvm::AddELFWriter(PassManagerBase &PM,
std::ostream &O,
TargetMachine &TM) {
ELFWriter *EW = new ELFWriter(O, TM);
FPM.add(EW);
PM.add(EW);
return &EW->getMachineCodeEmitter();
}

6
lib/CodeGen/LLVMTargetMachine.cpp
View File

@ -51,7 +51,7 @@ DisablePostRAScheduler("disable-post-RA-scheduler",
cl::init(true));
FileModel::Model
LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
std::ostream &Out,
CodeGenFileType FileType,
bool Fast) {
@ -158,7 +158,7 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
/// addPassesToEmitFileFinish - If the passes to emit the specified file had to
/// be split up (e.g., to add an object writer pass), this method can be used to
/// finish up adding passes to emit the file, if necessary.
bool LLVMTargetMachine::addPassesToEmitFileFinish(FunctionPassManager &PM,
bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM,
MachineCodeEmitter *MCE,
bool Fast) {
if (MCE)
@ -178,7 +178,7 @@ bool LLVMTargetMachine::addPassesToEmitFileFinish(FunctionPassManager &PM,
/// of functions. This method should returns true if machine code emission is
/// not supported.
///
bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
MachineCodeEmitter &MCE,
bool Fast) {
// Standard LLVM-Level Passes.

4
lib/CodeGen/MachOWriter.cpp
View File

@ -43,11 +43,11 @@ using namespace llvm;
/// AddMachOWriter - Concrete function to add the Mach-O writer to the function
/// pass manager.
MachineCodeEmitter *llvm::AddMachOWriter(FunctionPassManager &FPM,
MachineCodeEmitter *llvm::AddMachOWriter(PassManagerBase &PM,
std::ostream &O,
TargetMachine &TM) {
MachOWriter *MOW = new MachOWriter(O, TM);
FPM.add(MOW);
PM.add(MOW);
return &MOW->getMachineCodeEmitter();
}

10
lib/Target/ARM/ARMTargetMachine.cpp
View File

@ -116,12 +116,12 @@ const TargetAsmInfo *ARMTargetMachine::createTargetAsmInfo() const {
// Pass Pipeline Configuration
bool ARMTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
bool ARMTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
PM.add(createARMISelDag(*this));
return false;
}
bool ARMTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
bool ARMTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
// FIXME: temporarily disabling load / store optimization pass for Thumb mode.
if (!Fast && !DisableLdStOpti && !Subtarget.isThumb())
PM.add(createARMLoadStoreOptimizationPass());
@ -133,7 +133,7 @@ bool ARMTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
return true;
}
bool ARMTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
bool ARMTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out) {
// Output assembly language.
PM.add(createARMCodePrinterPass(Out, *this));
@ -141,7 +141,7 @@ bool ARMTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
}
bool ARMTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) {
// FIXME: Move this to TargetJITInfo!
setRelocationModel(Reloc::Static);
@ -153,7 +153,7 @@ bool ARMTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
return false;
}
bool ARMTargetMachine::addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
bool ARMTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) {
// Machine code emitter pass for ARM.
PM.add(createARMCodeEmitterPass(*this, MCE));

10
lib/Target/ARM/ARMTargetMachine.h
View File

@ -55,13 +55,13 @@ public:
virtual const TargetAsmInfo *createTargetAsmInfo() const;
// Pass Pipeline Configuration
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out);
virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast,
virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE);
};

10
lib/Target/Alpha/AlphaTargetMachine.cpp
View File

@ -70,29 +70,29 @@ AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS)
// Pass Pipeline Configuration
//===----------------------------------------------------------------------===//
bool AlphaTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
PM.add(createAlphaISelDag(*this));
return false;
}
bool AlphaTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
// Must run branch selection immediately preceding the asm printer
PM.add(createAlphaBranchSelectionPass());
return false;
}
bool AlphaTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out) {
PM.add(createAlphaLLRPPass(*this));
PM.add(createAlphaCodePrinterPass(Out, *this));
return false;
}
bool AlphaTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) {
PM.add(createAlphaCodeEmitterPass(*this, MCE));
if (DumpAsm)
PM.add(createAlphaCodePrinterPass(*cerr.stream(), *this));
return false;
}
bool AlphaTargetMachine::addSimpleCodeEmitter(FunctionPassManager &PM,
bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
bool Fast, bool DumpAsm,
MachineCodeEmitter &MCE) {
return addCodeEmitter(PM, Fast, DumpAsm, MCE);

10
lib/Target/Alpha/AlphaTargetMachine.h
View File

@ -58,13 +58,13 @@ public:
static unsigned getModuleMatchQuality(const Module &M);
// Pass Pipeline Configuration
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out);
virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast,
virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE);
};

4
lib/Target/CellSPU/SPUTargetMachine.cpp
View File

@ -71,14 +71,14 @@ SPUTargetMachine::SPUTargetMachine(const Module &M, const std::string &FS)
//===----------------------------------------------------------------------===//
bool
SPUTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast)
SPUTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast)
{
// Install an instruction selector.
PM.add(createSPUISelDag(*this));
return false;
}
bool SPUTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
bool SPUTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out) {
PM.add(createSPUAsmPrinterPass(Out, *this));
return false;

4
lib/Target/CellSPU/SPUTargetMachine.h
View File

@ -83,8 +83,8 @@ public:
}
// Pass Pipeline Configuration
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out);
};

6
lib/Target/IA64/IA64TargetMachine.cpp
View File

@ -73,17 +73,17 @@ IA64TargetMachine::IA64TargetMachine(const Module &M, const std::string &FS)
// Pass Pipeline Configuration
//===----------------------------------------------------------------------===//
bool IA64TargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
bool IA64TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
PM.add(createIA64DAGToDAGInstructionSelector(*this));
return false;
}
bool IA64TargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
bool IA64TargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
// Make sure everything is bundled happily
PM.add(createIA64BundlingPass(*this));
return true;
}
bool IA64TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
bool IA64TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out) {
PM.add(createIA64CodePrinterPass(Out, *this));
return false;

6
lib/Target/IA64/IA64TargetMachine.h
View File

@ -48,9 +48,9 @@ public:
static unsigned getModuleMatchQuality(const Module &M);
// Pass Pipeline Configuration
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out);
};
} // End llvm namespace

1
lib/Target/Mips/Mips.h
View File

@ -19,7 +19,6 @@
namespace llvm {
class MipsTargetMachine;
class FunctionPassManager;
class FunctionPass;
class MachineCodeEmitter;

6
lib/Target/Mips/MipsTargetMachine.cpp
View File

@ -65,7 +65,7 @@ getModuleMatchQuality(const Module &M)
// Install an instruction selector pass using
// the ISelDag to gen Mips code.
bool MipsTargetMachine::
addInstSelector(FunctionPassManager &PM, bool Fast)
addInstSelector(PassManagerBase &PM, bool Fast)
{
PM.add(createMipsISelDag(*this));
return false;
@ -75,7 +75,7 @@ addInstSelector(FunctionPassManager &PM, bool Fast)
// machine code is emitted. return true if -print-machineinstrs should
// print out the code after the passes.
bool MipsTargetMachine::
addPreEmitPass(FunctionPassManager &PM, bool Fast)
addPreEmitPass(PassManagerBase &PM, bool Fast)
{
PM.add(createMipsDelaySlotFillerPass(*this));
return true;
@ -84,7 +84,7 @@ addPreEmitPass(FunctionPassManager &PM, bool Fast)
// Implements the AssemblyEmitter for the target. Must return
// true if AssemblyEmitter is supported
bool MipsTargetMachine::
addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out)
{
// Output assembly language.

6
lib/Target/Mips/MipsTargetMachine.h
View File

@ -55,9 +55,9 @@ namespace llvm {
static unsigned getModuleMatchQuality(const Module &M);
// Pass Pipeline Configuration
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out);
};
} // End llvm namespace

1
lib/Target/PowerPC/PPC.h
View File

@ -23,7 +23,6 @@
namespace llvm {
class PPCTargetMachine;
class FunctionPassManager;
class FunctionPass;
class MachineCodeEmitter;

10
lib/Target/PowerPC/PPCTargetMachine.cpp
View File

@ -118,26 +118,26 @@ PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS)
// Pass Pipeline Configuration
//===----------------------------------------------------------------------===//
bool PPCTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
bool PPCTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
// Install an instruction selector.
PM.add(createPPCISelDag(*this));
return false;
}
bool PPCTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
// Must run branch selection immediately preceding the asm printer.
PM.add(createPPCBranchSelectionPass());
return false;
}
bool PPCTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out) {
PM.add(createPPCAsmPrinterPass(Out, *this));
return false;
}
bool PPCTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) {
// The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
// FIXME: This should be moved to TargetJITInfo!!
@ -161,7 +161,7 @@ bool PPCTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
return false;
}
bool PPCTargetMachine::addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) {
// Machine code emitter pass for PowerPC.
PM.add(createPPCCodeEmitterPass(*this, MCE));

10
lib/Target/PowerPC/PPCTargetMachine.h
View File

@ -65,13 +65,13 @@ public:
}
// Pass Pipeline Configuration
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out);
virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast,
virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool getEnableTailMergeDefault() const;
};

6
lib/Target/Sparc/SparcTargetMachine.cpp
View File

@ -61,7 +61,7 @@ unsigned SparcTargetMachine::getModuleMatchQuality(const Module &M) {
#endif
}
bool SparcTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
bool SparcTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
PM.add(createSparcISelDag(*this));
return false;
}
@ -69,13 +69,13 @@ bool SparcTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
/// addPreEmitPass - This pass may be implemented by targets that want to run
/// passes immediately before machine code is emitted. This should return
/// true if -print-machineinstrs should print out the code after the passes.
bool SparcTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
PM.add(createSparcFPMoverPass(*this));
PM.add(createSparcDelaySlotFillerPass(*this));
return true;
}
bool SparcTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
bool SparcTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out) {
// Output assembly language.
PM.add(createSparcCodePrinterPass(Out, *this));

6
lib/Target/Sparc/SparcTargetMachine.h
View File

@ -46,9 +46,9 @@ public:
static unsigned getModuleMatchQuality(const Module &M);
// Pass Pipeline Configuration
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out);
};

1
lib/Target/X86/X86.h
View File

@ -20,7 +20,6 @@
namespace llvm {
class X86TargetMachine;
class FunctionPassManager;
class FunctionPass;
class MachineCodeEmitter;

10
lib/Target/X86/X86TargetMachine.cpp
View File

@ -153,24 +153,24 @@ X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS,
// Pass Pipeline Configuration
//===----------------------------------------------------------------------===//
bool X86TargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
bool X86TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
// Install an instruction selector.
PM.add(createX86ISelDag(*this, Fast));
return false;
}
bool X86TargetMachine::addPostRegAlloc(FunctionPassManager &PM, bool Fast) {
bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, bool Fast) {
PM.add(createX86FloatingPointStackifierPass());
return true; // -print-machineinstr should print after this.
}
bool X86TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out) {
PM.add(createX86CodePrinterPass(Out, *this));
return false;
}
bool X86TargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) {
// FIXME: Move this to TargetJITInfo!
if (DefRelocModel == Reloc::Default) {
@ -189,7 +189,7 @@ bool X86TargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
return false;
}
bool X86TargetMachine::addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) {
PM.add(createX86CodeEmitterPass(*this, MCE));
if (DumpAsm)

10
lib/Target/X86/X86TargetMachine.h
View File

@ -61,13 +61,13 @@ public:
static unsigned getJITMatchQuality();
// Set up the pass pipeline.
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPostRegAlloc(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out);
virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast,
virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE);
};