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https://github.com/c64scene-ar/llvm-6502.git
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split DEBUG_VALUE printing stuff out to its own method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100315 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -87,6 +87,8 @@ class VISIBILITY_HIDDEN X86AsmPrinter : public AsmPrinter {
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void PrintPICBaseSymbol(raw_ostream &O) const;
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void PrintPICBaseSymbol(raw_ostream &O) const;
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bool runOnMachineFunction(MachineFunction &F);
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bool runOnMachineFunction(MachineFunction &F);
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void PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS);
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};
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};
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} // end namespace llvm
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} // end namespace llvm
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@@ -326,16 +326,10 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
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}
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}
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}
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}
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void X86AsmPrinter::PrintDebugValueComment(const MachineInstr *MI,
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raw_ostream &O) {
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void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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X86MCInstLower MCInstLowering(OutContext, Mang, *this);
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switch (MI->getOpcode()) {
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case TargetOpcode::DBG_VALUE: {
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// FIXME: if this is implemented for another target before it goes
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// FIXME: if this is implemented for another target before it goes
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// away completely, the common part should be moved into AsmPrinter.
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// away completely, the common part should be moved into AsmPrinter.
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if (!VerboseAsm)
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return;
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O << '\t' << MAI->getCommentString() << "DEBUG_VALUE: ";
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O << '\t' << MAI->getCommentString() << "DEBUG_VALUE: ";
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unsigned NOps = MI->getNumOperands();
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unsigned NOps = MI->getNumOperands();
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// cast away const; DIetc do not take const operands for some reason.
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// cast away const; DIetc do not take const operands for some reason.
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@@ -388,8 +382,17 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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O << "+";
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O << "+";
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printOperand(MI, NOps-2, O);
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printOperand(MI, NOps-2, O);
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OutStreamer.AddBlankLine();
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OutStreamer.AddBlankLine();
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}
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void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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X86MCInstLower MCInstLowering(OutContext, Mang, *this);
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switch (MI->getOpcode()) {
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case TargetOpcode::DBG_VALUE:
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if (VerboseAsm)
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PrintDebugValueComment(MI, O);
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return;
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return;
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}
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case X86::MOVPC32r: {
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case X86::MOVPC32r: {
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MCInst TmpInst;
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MCInst TmpInst;
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// This is a pseudo op for a two instruction sequence with a label, which
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// This is a pseudo op for a two instruction sequence with a label, which
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