From bfedb912cd35704fcd39411d886bbfaefa3faa15 Mon Sep 17 00:00:00 2001
From: Brian Gaeke <gaeke@uiuc.edu>
Date: Thu, 17 Jul 2003 21:30:06 +0000
Subject: [PATCH] Use getClassB for load and store; we don't want to abort when
 we try to load or store through a bool*.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7195 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/X86/InstSelectSimple.cpp | 4 ++--
 lib/Target/X86/X86ISelSimple.cpp    | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp
index b2e11ba9ca1..9474942d2a0 100644
--- a/lib/Target/X86/InstSelectSimple.cpp
+++ b/lib/Target/X86/InstSelectSimple.cpp
@@ -1433,7 +1433,7 @@ void ISel::visitLoadInst(LoadInst &I) {
   unsigned SrcAddrReg = getReg(I.getOperand(0));
   unsigned DestReg = getReg(I);
 
-  unsigned Class = getClass(I.getType());
+  unsigned Class = getClassB(I.getType());
   switch (Class) {
   case cFP: {
     MachineBasicBlock::iterator MBBI = BB->end();
@@ -1533,7 +1533,7 @@ void ISel::visitStoreInst(StoreInst &I) {
   unsigned ValReg      = getReg(I.getOperand(0));
   unsigned AddressReg  = getReg(I.getOperand(1));
 
-  unsigned Class = getClass(I.getOperand(0)->getType());
+  unsigned Class = getClassB(I.getOperand(0)->getType());
   switch (Class) {
   case cLong:
     if (isLittleEndian) {
diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp
index b2e11ba9ca1..9474942d2a0 100644
--- a/lib/Target/X86/X86ISelSimple.cpp
+++ b/lib/Target/X86/X86ISelSimple.cpp
@@ -1433,7 +1433,7 @@ void ISel::visitLoadInst(LoadInst &I) {
   unsigned SrcAddrReg = getReg(I.getOperand(0));
   unsigned DestReg = getReg(I);
 
-  unsigned Class = getClass(I.getType());
+  unsigned Class = getClassB(I.getType());
   switch (Class) {
   case cFP: {
     MachineBasicBlock::iterator MBBI = BB->end();
@@ -1533,7 +1533,7 @@ void ISel::visitStoreInst(StoreInst &I) {
   unsigned ValReg      = getReg(I.getOperand(0));
   unsigned AddressReg  = getReg(I.getOperand(1));
 
-  unsigned Class = getClass(I.getOperand(0)->getType());
+  unsigned Class = getClassB(I.getOperand(0)->getType());
   switch (Class) {
   case cLong:
     if (isLittleEndian) {