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Have MMX registers clobbered in x86-64 too.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36494 91177308-0d34-0410-b5e6-96231b3b80d8
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Bill Wendling 2007-04-26 21:06:48 +00:00
parent 5230eaa5a8
commit bff35d11f1
1 changed files with 1 additions and 0 deletions
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lib/Target/X86/X86InstrX86-64.td
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@ -115,6 +115,7 @@ let isCall = 1, noResults = 1 in
// All calls clobber the non-callee saved registers...
let Defs = [RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11,
FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0,
MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15] in {
def CALL64pcrel32 : I<0xE8, RawFrm, (ops i64imm:$dst, variable_ops),