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ARM assembly parsing needs to be paranoid about negative immediates.
Make sure to treat immediates as unsigned when doing relative comparisons. rdar://11153621 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153753 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -6835,7 +6835,7 @@ processInstruction(MCInst &Inst,
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// explicitly specified. From the ARM ARM: "Encoding T1 is preferred
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// to encoding T2 if <Rd> is specified and encoding T2 is preferred
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// to encoding T1 if <Rd> is omitted."
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if (Inst.getOperand(3).getImm() < 8 && Operands.size() == 6) {
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if ((unsigned)Inst.getOperand(3).getImm() < 8 && Operands.size() == 6) {
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Inst.setOpcode(ARM::tADDi3);
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return true;
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}
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@ -6845,7 +6845,7 @@ processInstruction(MCInst &Inst,
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// explicitly specified. From the ARM ARM: "Encoding T1 is preferred
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// to encoding T2 if <Rd> is specified and encoding T2 is preferred
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// to encoding T1 if <Rd> is omitted."
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if (Inst.getOperand(3).getImm() < 8 && Operands.size() == 6) {
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if ((unsigned)Inst.getOperand(3).getImm() < 8 && Operands.size() == 6) {
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Inst.setOpcode(ARM::tSUBi3);
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return true;
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}
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@ -6966,7 +6966,7 @@ processInstruction(MCInst &Inst,
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// If we can use the 16-bit encoding and the user didn't explicitly
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// request the 32-bit variant, transform it here.
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if (isARMLowRegister(Inst.getOperand(0).getReg()) &&
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Inst.getOperand(1).getImm() <= 255 &&
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(unsigned)Inst.getOperand(1).getImm() <= 255 &&
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((!inITBlock() && Inst.getOperand(2).getImm() == ARMCC::AL &&
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Inst.getOperand(4).getReg() == ARM::CPSR) ||
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(inITBlock() && Inst.getOperand(4).getReg() == 0)) &&
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@ -1130,6 +1130,8 @@ _func:
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moveq r1, #12
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movne.w r1, #12
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mov.w r6, #450
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it lo
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movlo r1, #-1
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@ alias for mvn
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mov r3, #-3
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@ -1149,7 +1151,8 @@ _func:
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@ CHECK: moveq r1, #12 @ encoding: [0x0c,0x21]
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@ CHECK: movne.w r1, #12 @ encoding: [0x4f,0xf0,0x0c,0x01]
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@ CHECK: mov.w r6, #450 @ encoding: [0x4f,0xf4,0xe1,0x76]
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@ CHECK: it lo @ encoding: [0x38,0xbf]
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@ CHECK: movlo.w r1, #-1 @ encoding: [0x4f,0xf0,0xff,0x31]
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@ CHECK: mvn r3, #2 @ encoding: [0x6f,0xf0,0x02,0x03]
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@------------------------------------------------------------------------------
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