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* Rename X86::IMULr16 -> X86::IMULrr16
* Implement R1 = R2 * C where R1 and R2 are 32 or 16 bits. This avoids an extra copy into a register, reducing register pressure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9278 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -1207,7 +1207,7 @@ void ISel::doMultiply(MachineBasicBlock *MBB, MachineBasicBlock::iterator &MBBI,
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return;
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case cInt:
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case cShort:
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BMI(BB, MBBI, Class == cInt ? X86::IMULr32 : X86::IMULr16, 2, DestReg)
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BMI(BB, MBBI, Class == cInt ? X86::IMULrr32 : X86::IMULrr16, 2, DestReg)
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.addReg(op0Reg).addReg(op1Reg);
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return;
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case cByte:
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@@ -1255,6 +1255,14 @@ void ISel::doMultiplyConst(MachineBasicBlock *MBB,
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return;
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}
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}
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if (Class == cShort) {
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BMI(MBB, IP, X86::IMULri16, 2, DestReg).addReg(op0Reg).addZImm(ConstRHS);
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return;
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} else if (Class == cInt) {
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BMI(MBB, IP, X86::IMULri32, 2, DestReg).addReg(op0Reg).addZImm(ConstRHS);
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return;
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}
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// Most general case, emit a normal multiply...
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static const unsigned MOVirTab[] = {
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@@ -1301,7 +1309,7 @@ void ISel::visitMul(BinaryOperator &I) {
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MachineBasicBlock::iterator MBBI = BB->end();
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unsigned AHBLReg = makeAnotherReg(Type::UIntTy); // AH*BL
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BMI(BB, MBBI, X86::IMULr32, 2, AHBLReg).addReg(Op0Reg+1).addReg(Op1Reg);
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BMI(BB, MBBI, X86::IMULrr32, 2, AHBLReg).addReg(Op0Reg+1).addReg(Op1Reg);
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unsigned AHBLplusOverflowReg = makeAnotherReg(Type::UIntTy);
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BuildMI(BB, X86::ADDrr32, 2, // AH*BL+(AL*BL >> 32)
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@@ -1309,7 +1317,7 @@ void ISel::visitMul(BinaryOperator &I) {
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MBBI = BB->end();
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unsigned ALBHReg = makeAnotherReg(Type::UIntTy); // AL*BH
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BMI(BB, MBBI, X86::IMULr32, 2, ALBHReg).addReg(Op0Reg).addReg(Op1Reg+1);
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BMI(BB, MBBI, X86::IMULrr32, 2, ALBHReg).addReg(Op0Reg).addReg(Op1Reg+1);
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BuildMI(BB, X86::ADDrr32, 2, // AL*BH + AH*BL + (AL*BL >> 32)
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DestReg+1).addReg(AHBLplusOverflowReg).addReg(ALBHReg);
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