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Remove PointerType from class Target
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28368 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -40,9 +40,6 @@ def ARMInstrInfo : InstrInfo {
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//===----------------------------------------------------------------------===//
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def ARM : Target {
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// Pointers are 32-bits in size.
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let PointerType = i32;
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// FIXME: Specify callee-saved registers
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let CalleeSavedRegisters = [];
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@ -65,9 +65,6 @@ def : Processor<"ev67" , Alpha21264Itineraries, [FeatureFIX, FeatureCIX]>;
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def Alpha : Target {
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// Pointers on Alpha are 64-bits in size.
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let PointerType = i64;
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let CalleeSavedRegisters =
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//saved regs
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[R9, R10, R11, R12, R13, R14,
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@ -91,10 +91,6 @@ def IA64 : Target {
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*/
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];
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// We don't go anywhere near the LP32 variant of IA64 as
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// sometimes seen in (for example) HP-UX
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let PointerType = i64;
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// Our instruction set
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let InstructionSet = IA64InstrInfo;
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@ -81,9 +81,6 @@ def PPCInstrInfo : InstrInfo {
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def PPC : Target {
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// Pointers on PPC are 32-bits in size.
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let PointerType = i32;
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// Information about the instructions.
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let InstructionSet = PPCInstrInfo;
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@ -75,9 +75,6 @@ def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
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//===----------------------------------------------------------------------===//
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def Sparc : Target {
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// Pointers are 32-bits in size.
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let PointerType = i32;
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// FIXME: Specify callee-saved registers
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let CalleeSavedRegisters = [];
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@ -271,10 +271,6 @@ class Target {
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// saved registers for a target.
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list<Register> CalleeSavedRegisters = [];
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// PointerType - Specify the value type to be used to represent pointers in
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// this target. Typically this is an i32 or i64 type.
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ValueType PointerType;
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// InstructionSet - Instruction set description for this target.
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InstrInfo InstructionSet;
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@ -133,9 +133,6 @@ def X86 : Target {
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// Specify the callee saved registers.
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let CalleeSavedRegisters = [ESI, EDI, EBX, EBP];
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// Yes, pointers are 32-bits in size.
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let PointerType = i32;
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// Information about the instructions...
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let InstructionSet = X86InstrInfo;
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