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Start using tablegenerated instruction descriptions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7538 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2,20 +2,26 @@ LEVEL = ../../..
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LIBRARYNAME = x86
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include $(LEVEL)/Makefile.common
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# Make sure that tblgen is run, first thing.
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$(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc X86GenRegisterInfo.inc
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$(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \
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X86GenRegisterInfo.inc X86GenInstrNames.inc \
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X86GenInstrInfo.inc
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X86GenRegisterNames.inc: $(wildcard *.td) $(TBLGEN)
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X86GenRegisterNames.inc: X86.td X86RegisterInfo.td $(TBLGEN)
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$(TBLGEN) X86.td -gen-register-enums -o $@
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X86GenRegisterInfo.h.inc: $(wildcard *.td) $(TBLGEN)
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X86GenRegisterInfo.h.inc: X86.td X86RegisterInfo.td $(TBLGEN)
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$(TBLGEN) X86.td -gen-register-desc-header -o $@
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X86GenRegisterInfo.inc: $(wildcard *.td) $(TBLGEN)
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X86GenRegisterInfo.inc: X86.td X86RegisterInfo.td $(TBLGEN)
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$(TBLGEN) X86.td -gen-register-desc -o $@
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X86GenInstrNames.inc: X86.td X86InstrInfo.td $(TBLGEN)
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$(TBLGEN) X86.td -gen-instr-enums -o $@
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X86GenInstrInfo.inc: X86.td X86InstrInfo.td $(TBLGEN)
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$(TBLGEN) X86.td -gen-instr-desc -o $@
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clean::
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$(VERB) rm -f *.inc
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