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https://github.com/c64scene-ar/llvm-6502.git
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Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only the Z flag (i.e. eq and ne). Make ARMcmpZ commutative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74423 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
David Goodwin
parent
cd1267d2d6
commit
c0309b48b5
@ -402,7 +402,7 @@ const char *ARMTargetLowering::getTargetNodeName(unsigned Opcode) const {
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case ARMISD::RET_FLAG: return "ARMISD::RET_FLAG";
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case ARMISD::PIC_ADD: return "ARMISD::PIC_ADD";
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case ARMISD::CMP: return "ARMISD::CMP";
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case ARMISD::CMPNZ: return "ARMISD::CMPNZ";
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case ARMISD::CMPZ: return "ARMISD::CMPZ";
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case ARMISD::CMPFP: return "ARMISD::CMPFP";
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case ARMISD::CMPFPw0: return "ARMISD::CMPFPw0";
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case ARMISD::FMSTAT: return "ARMISD::FMSTAT";
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@ -1592,10 +1592,8 @@ static SDValue getARMCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC,
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break;
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case ARMCC::EQ:
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case ARMCC::NE:
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case ARMCC::MI:
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case ARMCC::PL:
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// Uses only N and Z Flags
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CompareType = ARMISD::CMPNZ;
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// Uses only Z Flag
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CompareType = ARMISD::CMPZ;
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break;
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}
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ARMCC = DAG.getConstant(CondCode, MVT::i32);
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@ -45,7 +45,7 @@ namespace llvm {
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PIC_ADD, // Add with a PC operand and a PIC label.
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CMP, // ARM compare instructions.
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CMPNZ, // ARM compare that uses only N or Z flags.
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CMPZ, // ARM compare that sets only Z flag.
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CMPFP, // ARM VFP compare instruction, sets FPSCR.
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CMPFPw0, // ARM VFP compare against zero instruction, sets FPSCR.
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FMSTAT, // ARM fmstat instruction.
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@ -75,8 +75,8 @@ def ARMbrjt : SDNode<"ARMISD::BR_JT", SDT_ARMBrJT,
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def ARMcmp : SDNode<"ARMISD::CMP", SDT_ARMCmp,
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[SDNPOutFlag]>;
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def ARMcmpNZ : SDNode<"ARMISD::CMPNZ", SDT_ARMCmp,
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[SDNPOutFlag]>;
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def ARMcmpZ : SDNode<"ARMISD::CMPZ", SDT_ARMCmp,
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[SDNPOutFlag,SDNPCommutative]>;
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def ARMpic_add : SDNode<"ARMISD::PIC_ADD", SDT_ARMPICAdd>;
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@ -1272,19 +1272,19 @@ defm CMN : AI1_cmp_irs<0b1011, "cmn",
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// Note that TST/TEQ don't set all the same flags that CMP does!
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defm TST : AI1_cmp_irs<0b1000, "tst",
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BinOpFrag<(ARMcmpNZ (and node:$LHS, node:$RHS), 0)>, 1>;
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BinOpFrag<(ARMcmpZ (and node:$LHS, node:$RHS), 0)>, 1>;
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defm TEQ : AI1_cmp_irs<0b1001, "teq",
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BinOpFrag<(ARMcmpNZ (xor node:$LHS, node:$RHS), 0)>, 1>;
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BinOpFrag<(ARMcmpZ (xor node:$LHS, node:$RHS), 0)>, 1>;
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defm CMPnz : AI1_cmp_irs<0b1010, "cmp",
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BinOpFrag<(ARMcmpNZ node:$LHS, node:$RHS)>>;
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defm CMNnz : AI1_cmp_irs<0b1011, "cmn",
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BinOpFrag<(ARMcmpNZ node:$LHS,(ineg node:$RHS))>>;
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defm CMPz : AI1_cmp_irs<0b1010, "cmp",
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BinOpFrag<(ARMcmpZ node:$LHS, node:$RHS)>>;
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defm CMNz : AI1_cmp_irs<0b1011, "cmn",
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BinOpFrag<(ARMcmpZ node:$LHS,(ineg node:$RHS))>>;
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def : ARMPat<(ARMcmp GPR:$src, so_imm_neg:$imm),
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(CMNri GPR:$src, so_imm_neg:$imm)>;
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def : ARMPat<(ARMcmpNZ GPR:$src, so_imm_neg:$imm),
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def : ARMPat<(ARMcmpZ GPR:$src, so_imm_neg:$imm),
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(CMNri GPR:$src, so_imm_neg:$imm)>;
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@ -362,9 +362,9 @@ let Defs = [CPSR] in {
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def tCMN : T1I<(outs), (ins tGPR:$lhs, tGPR:$rhs),
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"cmn $lhs, $rhs",
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[(ARMcmp tGPR:$lhs, (ineg tGPR:$rhs))]>;
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def tCMNNZ : T1I<(outs), (ins tGPR:$lhs, tGPR:$rhs),
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"cmn $lhs, $rhs",
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[(ARMcmpNZ tGPR:$lhs, (ineg tGPR:$rhs))]>;
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def tCMNZ : T1I<(outs), (ins tGPR:$lhs, tGPR:$rhs),
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"cmn $lhs, $rhs",
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[(ARMcmpZ tGPR:$lhs, (ineg tGPR:$rhs))]>;
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}
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// CMP immediate
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@ -372,9 +372,9 @@ let Defs = [CPSR] in {
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def tCMPi8 : T1I<(outs), (ins tGPR:$lhs, i32imm:$rhs),
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"cmp $lhs, $rhs",
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[(ARMcmp tGPR:$lhs, imm0_255:$rhs)]>;
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def tCMPNZi8 : T1I<(outs), (ins tGPR:$lhs, i32imm:$rhs),
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"cmp $lhs, $rhs",
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[(ARMcmpNZ tGPR:$lhs, imm0_255:$rhs)]>;
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def tCMPZi8 : T1I<(outs), (ins tGPR:$lhs, i32imm:$rhs),
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"cmp $lhs, $rhs",
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[(ARMcmpZ tGPR:$lhs, imm0_255:$rhs)]>;
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}
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@ -383,9 +383,9 @@ let Defs = [CPSR] in {
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def tCMPr : T1I<(outs), (ins tGPR:$lhs, tGPR:$rhs),
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"cmp $lhs, $rhs",
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[(ARMcmp tGPR:$lhs, tGPR:$rhs)]>;
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def tCMPNZr : T1I<(outs), (ins tGPR:$lhs, tGPR:$rhs),
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"cmp $lhs, $rhs",
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[(ARMcmpNZ tGPR:$lhs, tGPR:$rhs)]>;
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def tCMPZr : T1I<(outs), (ins tGPR:$lhs, tGPR:$rhs),
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"cmp $lhs, $rhs",
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[(ARMcmpZ tGPR:$lhs, tGPR:$rhs)]>;
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}
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// TODO: A7-37: CMP(3) - cmp hi regs
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@ -551,7 +551,7 @@ def tSXTH : T1I<(outs tGPR:$dst), (ins tGPR:$src),
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let isCommutable = 1, Defs = [CPSR] in
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def tTST : T1I<(outs), (ins tGPR:$lhs, tGPR:$rhs),
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"tst $lhs, $rhs",
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[(ARMcmpNZ (and tGPR:$lhs, tGPR:$rhs), 0)]>;
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[(ARMcmpZ (and tGPR:$lhs, tGPR:$rhs), 0)]>;
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// zero-extend byte
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def tUXTB : T1I<(outs tGPR:$dst), (ins tGPR:$src),
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@ -607,18 +607,18 @@ def t2REVSH : T2I<(outs GPR:$dst), (ins GPR:$src),
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defm t2CMP : T2I_cmp_is<"cmp",
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BinOpFrag<(ARMcmp node:$LHS, node:$RHS)>>;
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defm t2CMPnz : T2I_cmp_is<"cmp",
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BinOpFrag<(ARMcmpNZ node:$LHS, node:$RHS)>>;
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defm t2CMPz : T2I_cmp_is<"cmp",
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BinOpFrag<(ARMcmpZ node:$LHS, node:$RHS)>>;
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defm t2CMN : T2I_cmp_is<"cmn",
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BinOpFrag<(ARMcmp node:$LHS,(ineg node:$RHS))>>;
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defm t2CMNnz : T2I_cmp_is<"cmn",
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BinOpFrag<(ARMcmpNZ node:$LHS,(ineg node:$RHS))>>;
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defm t2CMNz : T2I_cmp_is<"cmn",
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BinOpFrag<(ARMcmpZ node:$LHS,(ineg node:$RHS))>>;
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def : T2Pat<(ARMcmp GPR:$src, t2_so_imm_neg:$imm),
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(t2CMNri GPR:$src, t2_so_imm_neg:$imm)>;
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def : T2Pat<(ARMcmpNZ GPR:$src, t2_so_imm_neg:$imm),
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def : T2Pat<(ARMcmpZ GPR:$src, t2_so_imm_neg:$imm),
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(t2CMNri GPR:$src, t2_so_imm_neg:$imm)>;
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// FIXME: TST, TEQ, etc.
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25
test/CodeGen/Thumb2/thumb2-cmn.ll
Normal file
25
test/CodeGen/Thumb2/thumb2-cmn.ll
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@ -0,0 +1,25 @@
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; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\]} | count 4
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define i1 @f1(i32 %a, i32 %b) {
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%nb = sub i32 0, %b
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%tmp = icmp ne i32 %a, %nb
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ret i1 %tmp
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}
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define i1 @f2(i32 %a, i32 %b) {
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%nb = sub i32 0, %b
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%tmp = icmp ne i32 %nb, %a
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ret i1 %tmp
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}
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define i1 @f3(i32 %a, i32 %b) {
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%nb = sub i32 0, %b
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%tmp = icmp eq i32 %a, %nb
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ret i1 %tmp
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}
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define i1 @f4(i32 %a, i32 %b) {
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%nb = sub i32 0, %b
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%tmp = icmp eq i32 %nb, %a
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ret i1 %tmp
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}
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