Brian Gaeke says:

lib/Target/X86/InstSelectSimple.cpp: Add a little something to
 visitBranchInst which supports conditional branches.
lib/Target/X86/X86InstrInfo.def: Add defs of JNE, JE, CMPri8


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4755 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Brian Gaeke 2002-11-19 09:08:47 +00:00
parent a1a64f8f27
commit c03a0cb01b
3 changed files with 41 additions and 10 deletions

View File

@ -386,17 +386,31 @@ void ISel::visitReturnInst (ReturnInst &I) {
BuildMI(BB, X86::RET, 0);
}
/// visitBranchInst - Handle conditional and unconditional branches here. Note
/// that since code layout is frozen at this point, that if we are trying to
/// jump to a block that is the immediate successor of the current block, we can
/// just make a fall-through. (but we don't currently).
///
void ISel::visitBranchInst(BranchInst &BI) {
if (BI.isConditional()) // Only handles unconditional branches so far...
visitInstruction(BI);
void
ISel::visitBranchInst (BranchInst & BI)
{
if (BI.isConditional ())
{
BasicBlock *ifTrue = BI.getSuccessor (0);
BasicBlock *ifFalse = BI.getSuccessor (1); // this is really unobvious
BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(0));
// simplest thing I can think of: compare condition with zero,
// followed by jump-if-equal to ifFalse, and jump-if-nonequal to
// ifTrue
unsigned int condReg = getReg (BI.getCondition ());
BuildMI (BB, X86::CMPri8, 2, X86::EFLAGS).addReg (condReg).addZImm (0);
BuildMI (BB, X86::JNE, 1).addPCDisp (BI.getSuccessor (0));
BuildMI (BB, X86::JE, 1).addPCDisp (BI.getSuccessor (1));
}
else // unconditional branch
{
BuildMI (BB, X86::JMP, 1).addPCDisp (BI.getSuccessor (0));
}
}

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@ -386,17 +386,31 @@ void ISel::visitReturnInst (ReturnInst &I) {
BuildMI(BB, X86::RET, 0);
}
/// visitBranchInst - Handle conditional and unconditional branches here. Note
/// that since code layout is frozen at this point, that if we are trying to
/// jump to a block that is the immediate successor of the current block, we can
/// just make a fall-through. (but we don't currently).
///
void ISel::visitBranchInst(BranchInst &BI) {
if (BI.isConditional()) // Only handles unconditional branches so far...
visitInstruction(BI);
void
ISel::visitBranchInst (BranchInst & BI)
{
if (BI.isConditional ())
{
BasicBlock *ifTrue = BI.getSuccessor (0);
BasicBlock *ifFalse = BI.getSuccessor (1); // this is really unobvious
BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(0));
// simplest thing I can think of: compare condition with zero,
// followed by jump-if-equal to ifFalse, and jump-if-nonequal to
// ifTrue
unsigned int condReg = getReg (BI.getCondition ());
BuildMI (BB, X86::CMPri8, 2, X86::EFLAGS).addReg (condReg).addZImm (0);
BuildMI (BB, X86::JNE, 1).addPCDisp (BI.getSuccessor (0));
BuildMI (BB, X86::JE, 1).addPCDisp (BI.getSuccessor (1));
}
else // unconditional branch
{
BuildMI (BB, X86::JMP, 1).addPCDisp (BI.getSuccessor (0));
}
}

View File

@ -37,6 +37,8 @@ I(NOOP , "nop", 0x90, 0, X86II::RawFrm | X86II::Void) // no
// Flow control instructions
I(RET , "ret", 0xCB, M_RET_FLAG, X86II::RawFrm | X86II::Void) // ret
I(JMP , "jmp", 0x00, M_BRANCH_FLAG, X86II::Void) // jmp foo EB|E9 cb|w
I(JNE , "jne", 0x00, M_BRANCH_FLAG, X86II::Void) // 75 cb, or 0f 85 cw|cd
I(JE , "je", 0x00, M_BRANCH_FLAG, X86II::Void) // 74 cb, or 0f 84 cw|cd
// Misc instructions
I(LEAVE , "leave", 0xC9, 0, X86II::RawFrm) // leave
@ -134,6 +136,7 @@ I(SETNE , "setne", 0x95, 0, X86II::TB) // R8 = != 0F 9
I(CMPrr8 , "cmpb", 0x38, 0, X86II::MRMDestReg) // compare R8,R8 38/r
I(CMPrr16 , "cmpw", 0x39, 0, X86II::MRMDestReg) // compare R16,R16 39/r
I(CMPrr32 , "cmpl", 0x39, 0, X86II::MRMDestReg) // compare R32,R32 39/r
I(CMPri8 , "cmp", 0x80, 0, 0) // compare R8, imm8 80 /7 ib
// Sign extenders (first 3 are good for DIV/IDIV; the others are more general)
I(CBW , "cbw", 0x98, 0, X86II::RawFrm) // AX = signext(AL)