From c08163e72dca43ff5421a13505503314e0d7074a Mon Sep 17 00:00:00 2001 From: Anton Korobeynikov Date: Sun, 3 May 2009 13:11:35 +0000 Subject: [PATCH] Small tweaking git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70741 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/MSP430/MSP430ISelDAGToDAG.cpp | 4 ++-- lib/Target/MSP430/MSP430ISelLowering.cpp | 4 ++++ 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp b/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp index 522e170d60a..b8800f4b42f 100644 --- a/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp +++ b/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp @@ -82,10 +82,10 @@ bool MSP430DAGToDAGISel::SelectAddr(SDValue Op, SDValue Addr, return true; } - // Operand is a result from ADD with constant operand which fits into i16. switch (Addr.getOpcode()) { case ISD::ADD: - if (ConstantSDNode *CN = dyn_cast(Addr.getOperand(1))) { + // Operand is a result from ADD with constant operand which fits into i16. + if (ConstantSDNode *CN = dyn_cast(Addr.getOperand(1))) { uint64_t CVal = CN->getZExtValue(); // Offset should fit into 16 bits. if (((CVal << 48) >> 48) == CVal) { diff --git a/lib/Target/MSP430/MSP430ISelLowering.cpp b/lib/Target/MSP430/MSP430ISelLowering.cpp index 58ca76a230c..11b1fb442e9 100644 --- a/lib/Target/MSP430/MSP430ISelLowering.cpp +++ b/lib/Target/MSP430/MSP430ISelLowering.cpp @@ -54,6 +54,10 @@ MSP430TargetLowering::MSP430TargetLowering(MSP430TargetMachine &tm) : // shifts of the whole bitwidth 1 bit per step. setShiftAmountType(MVT::i8); + setStackPointerRegisterToSaveRestore(MSP430::SPW); + setBooleanContents(ZeroOrOneBooleanContent); + setSchedulingPreference(SchedulingForLatency); + setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote); setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote); setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);