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Reduce indentation and fix the count of how many PHIs we have inserted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134370 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -201,93 +201,98 @@ bool TailDuplicatePass::TailDuplicateBlocks(MachineFunction &MF) {
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SmallVector<MachineBasicBlock*, 8> TDBBs;
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SmallVector<MachineInstr*, 16> Copies;
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if (TailDuplicate(MBB, MF, TDBBs, Copies)) {
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++NumTails;
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if (!TailDuplicate(MBB, MF, TDBBs, Copies))
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continue;
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// TailBB's immediate successors are now successors of those predecessors
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// which duplicated TailBB. Add the predecessors as sources to the PHI
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// instructions.
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bool isDead = MBB->pred_empty() && !MBB->hasAddressTaken();
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if (PreRegAlloc)
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UpdateSuccessorsPHIs(MBB, isDead, TDBBs, Succs);
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++NumTails;
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// If it is dead, remove it.
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if (isDead) {
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NumInstrDups -= MBB->size();
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RemoveDeadBlock(MBB);
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++NumDeadBlocks;
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}
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// TailBB's immediate successors are now successors of those predecessors
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// which duplicated TailBB. Add the predecessors as sources to the PHI
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// instructions.
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bool isDead = MBB->pred_empty() && !MBB->hasAddressTaken();
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if (PreRegAlloc)
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UpdateSuccessorsPHIs(MBB, isDead, TDBBs, Succs);
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// Update SSA form.
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if (!SSAUpdateVRs.empty()) {
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for (unsigned i = 0, e = SSAUpdateVRs.size(); i != e; ++i) {
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unsigned VReg = SSAUpdateVRs[i];
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SSAUpdate.Initialize(VReg);
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// If the original definition is still around, add it as an available
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// value.
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MachineInstr *DefMI = MRI->getVRegDef(VReg);
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MachineBasicBlock *DefBB = 0;
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if (DefMI) {
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DefBB = DefMI->getParent();
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SSAUpdate.AddAvailableValue(DefBB, VReg);
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}
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// Add the new vregs as available values.
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DenseMap<unsigned, AvailableValsTy>::iterator LI =
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SSAUpdateVals.find(VReg);
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for (unsigned j = 0, ee = LI->second.size(); j != ee; ++j) {
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MachineBasicBlock *SrcBB = LI->second[j].first;
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unsigned SrcReg = LI->second[j].second;
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SSAUpdate.AddAvailableValue(SrcBB, SrcReg);
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}
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// Rewrite uses that are outside of the original def's block.
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MachineRegisterInfo::use_iterator UI = MRI->use_begin(VReg);
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while (UI != MRI->use_end()) {
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MachineOperand &UseMO = UI.getOperand();
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MachineInstr *UseMI = &*UI;
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++UI;
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if (UseMI->isDebugValue()) {
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// SSAUpdate can replace the use with an undef. That creates
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// a debug instruction that is a kill.
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// FIXME: Should it SSAUpdate job to delete debug instructions
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// instead of replacing the use with undef?
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UseMI->eraseFromParent();
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continue;
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}
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if (UseMI->getParent() == DefBB && !UseMI->isPHI())
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continue;
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SSAUpdate.RewriteUse(UseMO);
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}
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}
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SSAUpdateVRs.clear();
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SSAUpdateVals.clear();
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}
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// Eliminate some of the copies inserted by tail duplication to maintain
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// SSA form.
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for (unsigned i = 0, e = Copies.size(); i != e; ++i) {
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MachineInstr *Copy = Copies[i];
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if (!Copy->isCopy())
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continue;
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unsigned Dst = Copy->getOperand(0).getReg();
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unsigned Src = Copy->getOperand(1).getReg();
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MachineRegisterInfo::use_iterator UI = MRI->use_begin(Src);
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if (++UI == MRI->use_end()) {
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// Copy is the only use. Do trivial copy propagation here.
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MRI->replaceRegWith(Dst, Src);
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Copy->eraseFromParent();
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}
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}
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if (PreRegAlloc && TailDupVerify)
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VerifyPHIs(MF, false);
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MadeChange = true;
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// If it is dead, remove it.
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if (isDead) {
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NumInstrDups -= MBB->size();
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RemoveDeadBlock(MBB);
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++NumDeadBlocks;
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}
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// Update SSA form.
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if (!SSAUpdateVRs.empty()) {
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NewPHIs.clear();
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for (unsigned i = 0, e = SSAUpdateVRs.size(); i != e; ++i) {
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unsigned VReg = SSAUpdateVRs[i];
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SSAUpdate.Initialize(VReg);
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// If the original definition is still around, add it as an available
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// value.
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MachineInstr *DefMI = MRI->getVRegDef(VReg);
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MachineBasicBlock *DefBB = 0;
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if (DefMI) {
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DefBB = DefMI->getParent();
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SSAUpdate.AddAvailableValue(DefBB, VReg);
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}
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// Add the new vregs as available values.
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DenseMap<unsigned, AvailableValsTy>::iterator LI =
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SSAUpdateVals.find(VReg);
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for (unsigned j = 0, ee = LI->second.size(); j != ee; ++j) {
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MachineBasicBlock *SrcBB = LI->second[j].first;
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unsigned SrcReg = LI->second[j].second;
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SSAUpdate.AddAvailableValue(SrcBB, SrcReg);
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}
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// Rewrite uses that are outside of the original def's block.
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MachineRegisterInfo::use_iterator UI = MRI->use_begin(VReg);
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while (UI != MRI->use_end()) {
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MachineOperand &UseMO = UI.getOperand();
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MachineInstr *UseMI = &*UI;
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++UI;
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if (UseMI->isDebugValue()) {
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// SSAUpdate can replace the use with an undef. That creates
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// a debug instruction that is a kill.
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// FIXME: Should it SSAUpdate job to delete debug instructions
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// instead of replacing the use with undef?
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UseMI->eraseFromParent();
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continue;
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}
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if (UseMI->getParent() == DefBB && !UseMI->isPHI())
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continue;
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SSAUpdate.RewriteUse(UseMO);
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}
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}
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SSAUpdateVRs.clear();
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SSAUpdateVals.clear();
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}
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// Eliminate some of the copies inserted by tail duplication to maintain
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// SSA form.
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for (unsigned i = 0, e = Copies.size(); i != e; ++i) {
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MachineInstr *Copy = Copies[i];
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if (!Copy->isCopy())
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continue;
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unsigned Dst = Copy->getOperand(0).getReg();
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unsigned Src = Copy->getOperand(1).getReg();
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MachineRegisterInfo::use_iterator UI = MRI->use_begin(Src);
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if (++UI == MRI->use_end()) {
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// Copy is the only use. Do trivial copy propagation here.
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MRI->replaceRegWith(Dst, Src);
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Copy->eraseFromParent();
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}
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}
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if (PreRegAlloc && TailDupVerify)
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VerifyPHIs(MF, false);
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MadeChange = true;
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if (NewPHIs.size())
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NumAddedPHIs += NewPHIs.size();
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}
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NumAddedPHIs += NewPHIs.size();
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return MadeChange;
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}
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