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Change MachineBasicBlock's vector of MachineInstr pointers into an

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ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11340 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Alkis Evlogimenos
2004-02-12 02:27:10 +00:00
parent 918cdd420b
commit c0b9dc5be7
41 changed files with 380 additions and 408 deletions
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21
lib/CodeGen/RegAllocLinearScan.cpp
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@ -396,15 +396,15 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
for (currentInstr_ = currentMbb_->begin();
currentInstr_ != currentMbb_->end(); ) {
DEBUG(std::cerr << "\tinstruction: ";
(*currentInstr_)->print(std::cerr, *tm_););
currentInstr_->print(std::cerr, *tm_););
// use our current mapping and actually replace and
// virtual register with its allocated physical registers
DEBUG(std::cerr << "\t\treplacing virtual registers with mapped "
"physical registers:\n");
for (unsigned i = 0, e = (*currentInstr_)->getNumOperands();
for (unsigned i = 0, e = currentInstr_->getNumOperands();
i != e; ++i) {
MachineOperand& op = (*currentInstr_)->getOperand(i);
MachineOperand& op = currentInstr_->getOperand(i);
if (op.isRegister() &&
MRegisterInfo::isVirtualRegister(op.getReg())) {
unsigned virtReg = op.getReg();
@ -412,20 +412,19 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
if (it != v2pMap_.end()) {
DEBUG(std::cerr << "\t\t\t%reg" << it->first
<< " -> " << mri_->getName(it->second) << '\n');
(*currentInstr_)->SetMachineOperandReg(i, it->second);
currentInstr_->SetMachineOperandReg(i, it->second);
}
}
}
unsigned srcReg, dstReg;
if (tii.isMoveInstr(**currentInstr_, srcReg, dstReg) &&
if (tii.isMoveInstr(*currentInstr_, srcReg, dstReg) &&
((MRegisterInfo::isPhysicalRegister(srcReg) &&
MRegisterInfo::isPhysicalRegister(dstReg) &&
srcReg == dstReg) ||
(MRegisterInfo::isVirtualRegister(srcReg) &&
MRegisterInfo::isVirtualRegister(dstReg) &&
v2ssMap_[srcReg] == v2ssMap_[dstReg]))) {
delete *currentInstr_;
currentInstr_ = currentMbb_->erase(currentInstr_);
++numPeep;
DEBUG(std::cerr << "\t\tdeleting instruction\n");
@ -436,12 +435,12 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
Regs toClear;
Regs toSpill;
const unsigned numOperands = (*currentInstr_)->getNumOperands();
const unsigned numOperands = currentInstr_->getNumOperands();
DEBUG(std::cerr << "\t\tloading temporarily used operands to "
"registers:\n");
for (unsigned i = 0; i != numOperands; ++i) {
MachineOperand& op = (*currentInstr_)->getOperand(i);
MachineOperand& op = currentInstr_->getOperand(i);
if (op.isRegister() && op.isUse() &&
MRegisterInfo::isVirtualRegister(op.getReg())) {
unsigned virtReg = op.getAllocatedRegNum();
@ -460,7 +459,7 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
else
toClear.push_back(it);
}
(*currentInstr_)->SetMachineOperandReg(i, physReg);
currentInstr_->SetMachineOperandReg(i, physReg);
}
}
@ -472,7 +471,7 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
DEBUG(std::cerr << "\t\tassigning temporarily defined operands to "
"registers:\n");
for (unsigned i = 0; i != numOperands; ++i) {
MachineOperand& op = (*currentInstr_)->getOperand(i);
MachineOperand& op = currentInstr_->getOperand(i);
if (op.isRegister() &&
MRegisterInfo::isVirtualRegister(op.getReg())) {
assert(!op.isUse() && "we should not have uses here!");
@ -489,7 +488,7 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
// this instruction
toSpill.push_back(it);
}
(*currentInstr_)->SetMachineOperandReg(i, physReg);
currentInstr_->SetMachineOperandReg(i, physReg);
}
}
++currentInstr_; // spills will go after this instruction