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Breaking up the PowerPC target into 32- and 64-bit subparts: Part II: 64-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15635 91177308-0d34-0410-b5e6-96231b3b80d8
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lib/Target/PowerPC/PPC64.h
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lib/Target/PowerPC/PPC64.h
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//===-- PPC64.h - Top-level interface for AIX/PowerPC -------------*- C++ -*-//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in the LLVM
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// PowerPC 64-bit back-end.
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//
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//===----------------------------------------------------------------------===//
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#ifndef TARGET_POWERPC_AIX_H
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#define TARGET_POWERPC_AIX_H
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#include "PowerPC.h"
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#endif
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lib/Target/PowerPC/PPC64CodeEmitter.cpp
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lib/Target/PowerPC/PPC64CodeEmitter.cpp
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//===-- PPC64CodeEmitter.cpp - JIT Code Emitter for PPC64 -----*- C++ -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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#include "PPC64JITInfo.h"
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#include "PPC64TargetMachine.h"
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namespace llvm {
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/// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
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/// machine code emitted. This uses a MachineCodeEmitter object to handle
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/// actually outputting the machine code and resolving things like the address
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/// of functions. This method should returns true if machine code emission is
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/// not supported.
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///
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bool PPC64TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
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MachineCodeEmitter &MCE) {
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return true;
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// It should go something like this:
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// PM.add(new Emitter(MCE)); // Machine code emitter pass for PPC64
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// Delete machine code for this function after emitting it:
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// PM.add(createMachineCodeDeleter());
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}
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void *PPC64JITInfo::getJITStubForFunction(Function *F,
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MachineCodeEmitter &MCE) {
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assert (0 && "PPC64JITInfo::getJITStubForFunction not implemented");
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return 0;
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}
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void PPC64JITInfo::replaceMachineCodeForFunction (void *Old, void *New) {
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assert (0 && "PPC64JITInfo::replaceMachineCodeForFunction not implemented");
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}
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} // end llvm namespace
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lib/Target/PowerPC/PPC64JITInfo.h
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lib/Target/PowerPC/PPC64JITInfo.h
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//===- PPC64JITInfo.h - PowerPC/AIX impl. of the JIT interface -*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the PowerPC/AIX implementation of the TargetJITInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef POWERPC_AIX_JITINFO_H
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#define POWERPC_AIX_JITINFO_H
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#include "PowerPCJITInfo.h"
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namespace llvm {
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class TargetMachine;
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class PPC64JITInfo : public PowerPCJITInfo {
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public:
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PPC64JITInfo(TargetMachine &tm) : PowerPCJITInfo(tm) {}
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/// addPassesToJITCompile - Add passes to the specified pass manager to
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/// implement a fast dynamic compiler for this target. Return true if this
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/// is not supported for this target.
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///
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virtual void addPassesToJITCompile(FunctionPassManager &PM);
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/// replaceMachineCodeForFunction - Make it so that calling the function
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/// whose machine code is at OLD turns into a call to NEW, perhaps by
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/// overwriting OLD with a branch to NEW. This is used for self-modifying
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/// code.
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///
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virtual void replaceMachineCodeForFunction(void *Old, void *New);
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/// getJITStubForFunction - Create or return a stub for the specified
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/// function. This stub acts just like the specified function, except that
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/// it allows the "address" of the function to be taken without having to
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/// generate code for it.
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virtual void *getJITStubForFunction(Function *F, MachineCodeEmitter &MCE);
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};
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}
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#endif
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117
lib/Target/PowerPC/PPC64TargetMachine.cpp
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lib/Target/PowerPC/PPC64TargetMachine.cpp
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//===-- PPC64TargetMachine.cpp - Define TargetMachine for AIX/PowerPC ----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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#include "PowerPC.h"
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#include "PPC64JITInfo.h"
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#include "PPC64TargetMachine.h"
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#include "llvm/Module.h"
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#include "llvm/PassManager.h"
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#include "llvm/CodeGen/IntrinsicLowering.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetMachineRegistry.h"
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#include "llvm/Transforms/Scalar.h"
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#include <iostream>
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using namespace llvm;
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namespace {
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const std::string PPC64 = "AIX/PowerPC";
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// Register the target
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RegisterTarget<PPC64TargetMachine>
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X("powerpc-aix", " AIX/PowerPC (experimental)");
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}
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/// PPC64TargetMachine ctor
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///
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PPC64TargetMachine::PPC64TargetMachine(const Module &M, IntrinsicLowering *IL)
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// FIXME: this is wrong!
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: PowerPCTargetMachine(PPC64, IL,
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TargetData(PPC64,false,8,4,4,4,4,4,2,1,4),
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TargetFrameInfo(TargetFrameInfo::StackGrowsDown,16,-4),
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PPC64JITInfo(*this)) {}
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/// addPassesToEmitAssembly - Add passes to the specified pass manager
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/// to implement a static compiler for this target.
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///
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bool PPC64TargetMachine::addPassesToEmitAssembly(PassManager &PM,
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std::ostream &Out) {
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// FIXME: Implement efficient support for garbage collection intrinsics.
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PM.add(createLowerGCPass());
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// FIXME: Implement the invoke/unwind instructions!
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PM.add(createLowerInvokePass());
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// FIXME: Implement the switch instruction in the instruction selector!
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PM.add(createLowerSwitchPass());
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PM.add(createLowerConstantExpressionsPass());
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// Make sure that no unreachable blocks are instruction selected.
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PM.add(createUnreachableBlockEliminationPass());
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// FIXME: instruction selector!
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//PM.add(createPPCSimpleInstructionSelector(*this));
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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PM.add(createRegisterAllocator());
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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// I want a PowerPC specific prolog/epilog code inserter so I can put the
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// fills/spills in the right spots.
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//PM.add(createPowerPCPEI());
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// Must run branch selection immediately preceding the printer
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//PM.add(createPPCBranchSelectionPass());
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//PM.add(createPPC32AsmPrinterPass(Out, *this));
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PM.add(createMachineCodeDeleter());
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return false;
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}
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/// addPassesToJITCompile - Add passes to the specified pass manager to
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/// implement a fast dynamic compiler for this target.
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///
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void PPC64JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
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// FIXME: Implement efficient support for garbage collection intrinsics.
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PM.add(createLowerGCPass());
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// FIXME: Implement the invoke/unwind instructions!
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PM.add(createLowerInvokePass());
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// FIXME: Implement the switch instruction in the instruction selector!
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PM.add(createLowerSwitchPass());
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PM.add(createLowerConstantExpressionsPass());
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// Make sure that no unreachable blocks are instruction selected.
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PM.add(createUnreachableBlockEliminationPass());
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// FIXME: ISel
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//PM.add(createPPCSimpleInstructionSelector(TM));
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PM.add(createRegisterAllocator());
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PM.add(createPrologEpilogCodeInserter());
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}
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unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
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if (M.getEndianness() == Module::BigEndian &&
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M.getPointerSize() == Module::Pointer64)
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return 10; // Direct match
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else if (M.getEndianness() != Module::AnyEndianness ||
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M.getPointerSize() != Module::AnyPointerSize)
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return 0; // Match for some other target
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return getJITMatchQuality()/2;
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}
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lib/Target/PowerPC/PPC64TargetMachine.h
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lib/Target/PowerPC/PPC64TargetMachine.h
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//===-- PPC64TargetMachine.h - Define AIX/PowerPC TargetMachine --*- C++ -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the PowerPC/AIX specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef POWERPC_AIX_TARGETMACHINE_H
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#define POWERPC_AIX_TARGETMACHINE_H
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#include "PowerPCTargetMachine.h"
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namespace llvm {
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class PPC64TargetMachine : public PowerPCTargetMachine {
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public:
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PPC64TargetMachine(const Module &M, IntrinsicLowering *IL);
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/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
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/// get machine code emitted. This uses a MachineCodeEmitter object to handle
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/// actually outputting the machine code and resolving things like the address
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/// of functions. This method should returns true if machine code emission is
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/// not supported.
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///
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virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
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MachineCodeEmitter &MCE);
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virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out);
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static unsigned getModuleMatchQuality(const Module &M);
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};
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} // end namespace llvm
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#endif
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