diff --git a/lib/CodeGen/InlineSpiller.cpp b/lib/CodeGen/InlineSpiller.cpp index ab9054c77ff..7f7c15ea014 100644 --- a/lib/CodeGen/InlineSpiller.cpp +++ b/lib/CodeGen/InlineSpiller.cpp @@ -435,6 +435,8 @@ bool InlineSpiller::hoistSpill(LiveInterval &SpillLI, MachineInstr *CopyMI) { LiveInterval &OrigLI = LIS.getInterval(Original); VNInfo *OrigVNI = OrigLI.getVNInfoAt(Idx); StackInt.MergeValueInAsValue(OrigLI, OrigVNI, StackInt.getValNumInfo(0)); + DEBUG(dbgs() << "\tmerged orig valno " << OrigVNI->id << ": " + << StackInt << '\n'); // Already spilled everywhere. if (SVI.AllDefsAreReloads) @@ -480,6 +482,7 @@ void InlineSpiller::eliminateRedundantSpills(unsigned Reg, VNInfo *VNI) { // Add all of VNI's live range to StackInt. LiveInterval &LI = LIS.getInterval(Reg); StackInt.MergeValueInAsValue(LI, VNI, StackInt.getValNumInfo(0)); + DEBUG(dbgs() << "Merged to stack int: " << StackInt << '\n'); // Find all spills and copies of VNI. for (MachineRegisterInfo::use_nodbg_iterator UI = MRI.use_nodbg_begin(Reg); @@ -874,6 +877,7 @@ void InlineSpiller::spill(LiveRangeEdit &edit) { for (unsigned i = 0, e = RegsToSpill.size(); i != e; ++i) stacklvr.MergeRangesInAsValue(LIS.getInterval(RegsToSpill[i]), stacklvr.getValNumInfo(0)); + DEBUG(dbgs() << "Merged spilled regs: " << stacklvr << '\n'); // Spill around uses of all RegsToSpill. for (unsigned i = 0, e = RegsToSpill.size(); i != e; ++i) diff --git a/lib/CodeGen/RegAllocGreedy.cpp b/lib/CodeGen/RegAllocGreedy.cpp index 6feae4790d0..c1d8272dc50 100644 --- a/lib/CodeGen/RegAllocGreedy.cpp +++ b/lib/CodeGen/RegAllocGreedy.cpp @@ -1265,6 +1265,7 @@ unsigned RAGreedy::selectOrSplit(LiveInterval &VirtReg, // Wait until the second time, when all smaller ranges have been allocated. // This gives a better picture of the interference to split around. if (Stage == RS_Original) { + DEBUG(dbgs() << "wait for second round\n"); NewVRegs.push_back(&VirtReg); return 0; }