diff --git a/include/llvm/Target/MachineInstrInfo.h b/include/llvm/Target/MachineInstrInfo.h index 8fe4d3b4f6f..bc726f99bfd 100644 --- a/include/llvm/Target/MachineInstrInfo.h +++ b/include/llvm/Target/MachineInstrInfo.h @@ -13,7 +13,6 @@ #include "llvm/DerivedTypes.h" class MachineInstrDescriptor; -class TmpInstruction; class MachineInstr; class TargetMachine; class Value; @@ -27,7 +26,7 @@ class MachineCodeForInstruction; typedef int MachineOpCode; typedef int OpCodeMask; -typedef int InstrSchedClass; +typedef unsigned InstrSchedClass; const MachineOpCode INVALID_MACHINE_OPCODE = -1; diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index 8fe4d3b4f6f..bc726f99bfd 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -13,7 +13,6 @@ #include "llvm/DerivedTypes.h" class MachineInstrDescriptor; -class TmpInstruction; class MachineInstr; class TargetMachine; class Value; @@ -27,7 +26,7 @@ class MachineCodeForInstruction; typedef int MachineOpCode; typedef int OpCodeMask; -typedef int InstrSchedClass; +typedef unsigned InstrSchedClass; const MachineOpCode INVALID_MACHINE_OPCODE = -1; diff --git a/include/llvm/Target/TargetSchedInfo.h b/include/llvm/Target/TargetSchedInfo.h index 48da1c1d3ba..9d894751d23 100644 --- a/include/llvm/Target/TargetSchedInfo.h +++ b/include/llvm/Target/TargetSchedInfo.h @@ -196,9 +196,8 @@ protected: assert(opCode >= 0 && opCode < (int) instrRUsages.size()); return instrRUsages[opCode]; } - inline const InstrClassRUsage& - getClassRUsage(const InstrSchedClass& sc) const { - assert(sc >= 0 && sc < numSchedClasses); + const InstrClassRUsage& getClassRUsage(const InstrSchedClass& sc) const { + assert(sc < numSchedClasses); return classRUsages[sc]; } @@ -225,7 +224,7 @@ public: } inline unsigned getMaxIssueForClass(const InstrSchedClass& sc) const { - assert(sc >= 0 && sc < numSchedClasses); + assert(sc < numSchedClasses); return classRUsages[sc].maxNumIssue; } @@ -283,7 +282,7 @@ private: } protected: - int numSchedClasses; + unsigned numSchedClasses; const MachineInstrInfo* mii; const InstrClassRUsage* classRUsages; // raw array by sclass const InstrRUsageDelta* usageDeltas; // raw array [1:numUsageDeltas]