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add some nounwind's

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112396 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-08-29 03:07:47 +00:00
parent 2c4b30ebca
commit c19b9477c9
7 changed files with 13 additions and 13 deletions
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4
test/CodeGen/X86/vec_shuffle-10.ll
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@ -3,7 +3,7 @@
; RUN: grep pshufd %t | count 1
; RUN: not grep {sub.*esp} %t
define void @test(<4 x float>* %res, <4 x float>* %A, <4 x float>* %B) {
define void @test(<4 x float>* %res, <4 x float>* %A, <4 x float>* %B) nounwind {
%tmp = load <4 x float>* %B ; <<4 x float>> [#uses=2]
%tmp3 = load <4 x float>* %A ; <<4 x float>> [#uses=2]
%tmp.upgrd.1 = extractelement <4 x float> %tmp3, i32 0 ; <float> [#uses=1]
@ -18,7 +18,7 @@ define void @test(<4 x float>* %res, <4 x float>* %A, <4 x float>* %B) {
ret void
}
define void @test2(<4 x float> %X, <4 x float>* %res) {
define void @test2(<4 x float> %X, <4 x float>* %res) nounwind {
%tmp5 = shufflevector <4 x float> %X, <4 x float> undef, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1]
store <4 x float> %tmp5, <4 x float>* %res
ret void

4
test/CodeGen/X86/vec_shuffle-3.ll
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@ -2,7 +2,7 @@
; RUN: grep movlhps %t | count 1
; RUN: grep movhlps %t | count 1
define <4 x float> @test1(<4 x float>* %x, <4 x float>* %y) {
define <4 x float> @test1(<4 x float>* %x, <4 x float>* %y) nounwind {
%tmp = load <4 x float>* %y ; <<4 x float>> [#uses=2]
%tmp5 = load <4 x float>* %x ; <<4 x float>> [#uses=2]
%tmp9 = fadd <4 x float> %tmp5, %tmp ; <<4 x float>> [#uses=1]
@ -11,7 +11,7 @@ define <4 x float> @test1(<4 x float>* %x, <4 x float>* %y) {
ret <4 x float> %tmp27
}
define <4 x float> @movhl(<4 x float>* %x, <4 x float>* %y) {
define <4 x float> @movhl(<4 x float>* %x, <4 x float>* %y) nounwind {
entry:
%tmp = load <4 x float>* %y ; <<4 x float>> [#uses=1]
%tmp3 = load <4 x float>* %x ; <<4 x float>> [#uses=1]

2
test/CodeGen/X86/vec_shuffle-4.ll
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@ -2,7 +2,7 @@
; RUN: grep shuf %t | count 2
; RUN: not grep unpck %t
define void @test(<4 x float>* %res, <4 x float>* %A, <4 x float>* %B, <4 x float>* %C) {
define void @test(<4 x float>* %res, <4 x float>* %A, <4 x float>* %B, <4 x float>* %C) nounwind {
%tmp3 = load <4 x float>* %B ; <<4 x float>> [#uses=1]
%tmp5 = load <4 x float>* %C ; <<4 x float>> [#uses=1]
%tmp11 = shufflevector <4 x float> %tmp3, <4 x float> %tmp5, <4 x i32> < i32 1, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]

8
test/CodeGen/X86/vec_shuffle-6.ll
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@ -6,7 +6,7 @@
target triple = "i686-apple-darwin"
@x = external global [4 x i32]
define <2 x i64> @test1() {
define <2 x i64> @test1() nounwind {
%tmp = load i32* getelementptr ([4 x i32]* @x, i32 0, i32 0) ; <i32> [#uses=1]
%tmp3 = load i32* getelementptr ([4 x i32]* @x, i32 0, i32 1) ; <i32> [#uses=1]
%tmp5 = load i32* getelementptr ([4 x i32]* @x, i32 0, i32 2) ; <i32> [#uses=1]
@ -19,7 +19,7 @@ define <2 x i64> @test1() {
ret <2 x i64> %tmp16
}
define <4 x float> @test2(i32 %dummy, float %a, float %b, float %c, float %d) {
define <4 x float> @test2(i32 %dummy, float %a, float %b, float %c, float %d) nounwind {
%tmp = insertelement <4 x float> undef, float %a, i32 0 ; <<4 x float>> [#uses=1]
%tmp11 = insertelement <4 x float> %tmp, float %b, i32 1 ; <<4 x float>> [#uses=1]
%tmp12 = insertelement <4 x float> %tmp11, float %c, i32 2 ; <<4 x float>> [#uses=1]
@ -27,7 +27,7 @@ define <4 x float> @test2(i32 %dummy, float %a, float %b, float %c, float %d) {
ret <4 x float> %tmp13
}
define <4 x float> @test3(float %a, float %b, float %c, float %d) {
define <4 x float> @test3(float %a, float %b, float %c, float %d) nounwind {
%tmp = insertelement <4 x float> undef, float %a, i32 0 ; <<4 x float>> [#uses=1]
%tmp11 = insertelement <4 x float> %tmp, float %b, i32 1 ; <<4 x float>> [#uses=1]
%tmp12 = insertelement <4 x float> %tmp11, float %c, i32 2 ; <<4 x float>> [#uses=1]
@ -35,7 +35,7 @@ define <4 x float> @test3(float %a, float %b, float %c, float %d) {
ret <4 x float> %tmp13
}
define <2 x double> @test4(double %a, double %b) {
define <2 x double> @test4(double %a, double %b) nounwind {
%tmp = insertelement <2 x double> undef, double %a, i32 0 ; <<2 x double>> [#uses=1]
%tmp7 = insertelement <2 x double> %tmp, double %b, i32 1 ; <<2 x double>> [#uses=1]
ret <2 x double> %tmp7

4
test/CodeGen/X86/vec_shuffle-7.ll
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@ -2,10 +2,10 @@
; RUN: grep pxor %t | count 1
; RUN: not grep shufps %t
define void @test() {
define void @test() nounwind {
bitcast <4 x i32> zeroinitializer to <4 x float> ; <<4 x float>>:1 [#uses=1]
shufflevector <4 x float> %1, <4 x float> zeroinitializer, <4 x i32> zeroinitializer ; <<4 x float>>:2 [#uses=1]
store <4 x float> %2, <4 x float>* null
unreachable
ret void
}

2
test/CodeGen/X86/vec_shuffle-8.ll
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@ -1,7 +1,7 @@
; RUN: llc < %s -march=x86 -mattr=+sse2 | \
; RUN: not grep shufps
define void @test(<4 x float>* %res, <4 x float>* %A) {
define void @test(<4 x float>* %res, <4 x float>* %A) nounwind {
%tmp1 = load <4 x float>* %A ; <<4 x float>> [#uses=1]
%tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>> [#uses=1]
store <4 x float> %tmp2, <4 x float>* %res

2
test/CodeGen/X86/vec_shuffle-9.ll
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@ -1,6 +1,6 @@
; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
define <4 x i32> @test(i8** %ptr) {
define <4 x i32> @test(i8** %ptr) nounwind {
; CHECK: pxor
; CHECK: punpcklbw
; CHECK: punpcklwd