[ARM] Add Thumb-2 code size optimization regression test for LSR (register).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217582 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tilmann Scheller 2014-09-11 10:45:50 +00:00
parent 171bd26061
commit c1df48dde2

View File

@ -73,3 +73,12 @@ entry:
%shr = lshr i32 %a, 13
ret i32 %shr
}
define i32 @lsr-reg(i32 %a, i32 %b) nounwind readnone {
; CHECK-LABEL: "lsr-reg":
; CHECK: lsr.w r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} @ encoding: [{{0x..,0x..,0x..,0x..}}]
; CHECK-OPT: lsrs r{{[0-7]}}, r{{[0-7]}} @ encoding: [{{0x..,0x..}}]
entry:
%shr = lshr i32 %a, %b
ret i32 %shr
}