Emit .line debug directives for stoppoints. The debug location is retrieved by the MachineInstr itself, rather than by custom handling the DBG_STOPPOINT nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68602 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sanjiv Gupta 2009-04-08 06:24:04 +00:00
parent ddfa57bd7b
commit c1fa70c35a
5 changed files with 19 additions and 24 deletions

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@ -113,6 +113,8 @@ bool PIC16AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
SectionFlags::Code);
O << "\n";
SwitchToSection (fCodeSection);
// Emit the frame address of the function at the beginning of code.
O << CurrentFnName << ":\n";
O << " retlw low(" << CurrentFnName << ".frame)\n";
O << " retlw high(" << CurrentFnName << ".frame)\n";
@ -127,10 +129,23 @@ bool PIC16AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
O << '\n';
}
CurBank = "";
// For emitting line directives, we need to keep track of the current
// source line. When it changes then only emit the line directive.
unsigned CurLine = 0;
for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
II != E; ++II) {
// Emit the line directive if source line changed.
const DebugLoc DL = II->getDebugLoc();
if (!DL.isUnknown()) {
unsigned line = MF.getDebugLocTuple(DL).Line;
if (line != CurLine) {
O << "\t.line " << line << "\n";
CurLine = line;
}
}
// Print the assembly for the instruction.
printMachineInstruction(II);
printMachineInstruction(II);
}
}
return false; // we didn't modify anything.

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@ -137,8 +137,6 @@ PIC16TargetLowering::PIC16TargetLowering(PIC16TargetMachine &TM)
//setOperationAction(ISD::TRUNCATE, MVT::i16, Custom);
setTruncStoreAction(MVT::i16, MVT::i8, Custom);
setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Custom);
// Now deduce the information based on the above mentioned
// actions
computeRegisterProperties();
@ -274,7 +272,6 @@ const char *PIC16TargetLowering::getTargetNodeName(unsigned Opcode) const {
case PIC16ISD::SELECT_ICC: return "PIC16ISD::SELECT_ICC";
case PIC16ISD::BRCOND: return "PIC16ISD::BRCOND";
case PIC16ISD::Dummy: return "PIC16ISD::Dummy";
case PIC16ISD::PIC16StopPoint: return "PIC16ISD::PIC16StopPoint";
}
}
@ -825,21 +822,10 @@ SDValue PIC16TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {
return LowerBR_CC(Op, DAG);
case ISD::SELECT_CC:
return LowerSELECT_CC(Op, DAG);
case ISD::DBG_STOPPOINT:
return LowerStopPoint(Op, DAG);
}
return SDValue();
}
SDValue PIC16TargetLowering::LowerStopPoint(SDValue Op, SelectionDAG &DAG) {
DbgStopPointSDNode *SP = dyn_cast<DbgStopPointSDNode>(Op);
unsigned line = SP->getLine();
SDValue LineNode = DAG.getConstant(line, MVT::i8);
DebugLoc dl = Op.getDebugLoc();
return DAG.getNode(PIC16ISD::PIC16StopPoint, dl, MVT::Other,
Op.getOperand(0), LineNode);
}
SDValue PIC16TargetLowering::ConvertToMemOperand(SDValue Op,
SelectionDAG &DAG,
DebugLoc dl) {

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@ -52,7 +52,6 @@ namespace llvm {
SUBCC, // Compare for equality or inequality.
SELECT_ICC, // Psuedo to be caught in schedular and expanded to brcond.
BRCOND, // Conditional branch.
PIC16StopPoint,
Dummy
};
@ -111,7 +110,6 @@ namespace llvm {
SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG);
SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG);
SDValue LowerStopPoint(SDValue Op, SelectionDAG &DAG);
SDValue getPIC16Cmp(SDValue LHS, SDValue RHS, unsigned OrigCC, SDValue &CC,
SelectionDAG &DAG, DebugLoc dl);
virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,

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@ -71,9 +71,6 @@ def PIC16callseq_start : SDNode<"ISD::CALLSEQ_START", SDTI8VoidOp,
def PIC16callseq_end : SDNode<"ISD::CALLSEQ_END", SDTI8VoidOp,
[SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
def PIC16StopPoint : SDNode<"PIC16ISD::PIC16StopPoint", SDTI8VoidOp,
[SDNPHasChain]>;
// Low 8-bits of GlobalAddress.
def PIC16Lo : SDNode<"PIC16ISD::Lo", SDTI8UnaryOp>;
@ -171,10 +168,6 @@ class BinOpLW<bits<6> opcode, string OpcStr, SDNode OpNode> :
// PIC16 Instructions.
//===----------------------------------------------------------------------===//
def line_directive : ByteFormat<0, (outs), (ins i8imm:$src),
".line $src",
[(PIC16StopPoint (i8 imm:$src))]>;
// Pseudo-instructions.
def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i8imm:$amt),
"!ADJCALLSTACKDOWN $amt",

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@ -35,6 +35,9 @@ PIC16TargetAsmInfo(const PIC16TargetMachine &TM)
ReadOnlySection = getNamedSection("romdata.# ROMDATA", SectionFlags::None);
DataSection = getNamedSection("idata.# IDATA", SectionFlags::Writeable);
SwitchToSectionDirective = "";
// Need because otherwise a .text symbol is emitted by DwarfWriter
// in BeginModule, and gpasm cribbs for that .text symbol.
TextSection = getUnnamedSection("", SectionFlags::Code);
}
const char *PIC16TargetAsmInfo::getRomDirective(unsigned size) const