mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-09-24 23:28:41 +00:00
assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of line. LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for NDEBUG builds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75379 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -31,6 +31,7 @@
|
||||
#include "llvm/CodeGen/SelectionDAGISel.h"
|
||||
#include "llvm/CodeGen/ValueTypes.h"
|
||||
#include "llvm/Support/Debug.h"
|
||||
#include "llvm/Support/ErrorHandling.h"
|
||||
using namespace llvm;
|
||||
|
||||
const char *MipsTargetLowering::
|
||||
@@ -247,7 +248,7 @@ static Mips::FPBranchCode GetFPBranchCodeFromCond(Mips::CondCode CC) {
|
||||
static unsigned FPBranchCodeToOpc(Mips::FPBranchCode BC) {
|
||||
switch(BC) {
|
||||
default:
|
||||
assert(0 && "Unknown branch code");
|
||||
LLVM_UNREACHABLE("Unknown branch code");
|
||||
case Mips::BRANCH_T : return Mips::BC1T;
|
||||
case Mips::BRANCH_F : return Mips::BC1F;
|
||||
case Mips::BRANCH_TL : return Mips::BC1TL;
|
||||
@@ -257,7 +258,7 @@ static unsigned FPBranchCodeToOpc(Mips::FPBranchCode BC) {
|
||||
|
||||
static Mips::CondCode FPCondCCodeToFCC(ISD::CondCode CC) {
|
||||
switch (CC) {
|
||||
default: assert(0 && "Unknown fp condition code!");
|
||||
default: LLVM_UNREACHABLE("Unknown fp condition code!");
|
||||
case ISD::SETEQ:
|
||||
case ISD::SETOEQ: return Mips::FCOND_EQ;
|
||||
case ISD::SETUNE: return Mips::FCOND_OGL;
|
||||
@@ -541,14 +542,14 @@ LowerGlobalAddress(SDValue Op, SelectionDAG &DAG)
|
||||
return DAG.getNode(ISD::ADD, dl, MVT::i32, ResNode, Lo);
|
||||
}
|
||||
|
||||
assert(0 && "Dont know how to handle GlobalAddress");
|
||||
LLVM_UNREACHABLE("Dont know how to handle GlobalAddress");
|
||||
return SDValue(0,0);
|
||||
}
|
||||
|
||||
SDValue MipsTargetLowering::
|
||||
LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG)
|
||||
{
|
||||
assert(0 && "TLS not implemented for MIPS.");
|
||||
LLVM_UNREACHABLE("TLS not implemented for MIPS.");
|
||||
return SDValue(); // Not reached
|
||||
}
|
||||
|
||||
@@ -752,7 +753,7 @@ LowerCALL(SDValue Op, SelectionDAG &DAG)
|
||||
|
||||
// Promote the value if needed.
|
||||
switch (VA.getLocInfo()) {
|
||||
default: assert(0 && "Unknown loc info!");
|
||||
default: LLVM_UNREACHABLE("Unknown loc info!");
|
||||
case CCValAssign::Full:
|
||||
if (Subtarget->isABI_O32() && VA.isRegLoc()) {
|
||||
if (VA.getValVT() == MVT::f32 && VA.getLocVT() == MVT::i32)
|
||||
@@ -977,7 +978,7 @@ LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG)
|
||||
if (!Subtarget->isSingleFloat())
|
||||
RC = Mips::AFGR64RegisterClass;
|
||||
} else
|
||||
assert(0 && "RegVT not supported by FORMAL_ARGUMENTS Lowering");
|
||||
LLVM_UNREACHABLE("RegVT not supported by FORMAL_ARGUMENTS Lowering");
|
||||
|
||||
// Transform the arguments stored on
|
||||
// physical registers into virtual ones
|
||||
@@ -1139,7 +1140,7 @@ LowerRET(SDValue Op, SelectionDAG &DAG)
|
||||
unsigned Reg = MipsFI->getSRetReturnReg();
|
||||
|
||||
if (!Reg)
|
||||
assert(0 && "sret virtual register not created in the entry block");
|
||||
LLVM_UNREACHABLE("sret virtual register not created in the entry block");
|
||||
SDValue Val = DAG.getCopyFromReg(Chain, dl, Reg, getPointerTy());
|
||||
|
||||
Chain = DAG.getCopyToReg(Chain, dl, Mips::V0, Val, Flag);
|
||||
|
Reference in New Issue
Block a user