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https://github.com/c64scene-ar/llvm-6502.git
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Handle abnormal jmpl syntax correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@844 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -46,9 +46,7 @@ private :
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//void processMethodArgument(const MethodArgument *MA);
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void emitBasicBlock(const BasicBlock *BB);
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void emitMachineInst(const MachineInstr *MI);
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//void writeOperand(const Value *Op, bool PrintType, bool PrintName = true);
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void printOperand(const MachineOperand &Op);
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// enterSection - Use this method to enter a different section of the output
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@ -120,24 +118,7 @@ private :
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};
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void SparcAsmPrinter::emitMachineInst(const MachineInstr *MI) {
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unsigned Opcode = MI->getOpCode();
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if (TargetInstrDescriptors[Opcode].iclass & M_DUMMY_PHI_FLAG)
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return; // IGNORE PHI NODES
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Out << "\t" << TargetInstrDescriptors[Opcode].opCodeString << "\t";
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unsigned Mask = getOperandMask(Opcode);
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bool NeedComma = false;
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for(unsigned OpNum = 0; OpNum < MI->getNumOperands(); ++OpNum) {
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if ((1 << OpNum) & Mask) continue; // Ignore this operand?
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const MachineOperand &Op = MI->getOperand(OpNum);
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if (NeedComma) Out << ", "; // Handle comma outputing
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NeedComma = true;
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void SparcAsmPrinter::printOperand(const MachineOperand &Op) {
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switch (Op.getOperandType()) {
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case MachineOperand::MO_VirtualRegister:
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case MachineOperand::MO_CCRegister:
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@ -147,10 +128,9 @@ void SparcAsmPrinter::emitMachineInst(const MachineInstr *MI) {
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// ****this code is temporary till NULL Values are fixed
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if (RegNum == 10000) {
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Out << "<NULL VALUE>";
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continue;
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}
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} else {
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Out << "%" << Target.getRegInfo().getUnifiedRegName(RegNum);
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}
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break;
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}
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@ -171,6 +151,41 @@ void SparcAsmPrinter::emitMachineInst(const MachineInstr *MI) {
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break;
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}
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}
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void SparcAsmPrinter::emitMachineInst(const MachineInstr *MI) {
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unsigned Opcode = MI->getOpCode();
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if (TargetInstrDescriptors[Opcode].iclass & M_DUMMY_PHI_FLAG)
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return; // IGNORE PHI NODES
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Out << "\t" << TargetInstrDescriptors[Opcode].opCodeString << "\t";
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switch (Opcode) { // Some opcodes have special syntax...
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case JMPL:
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assert(MI->getNumOperands() == 3 && "Unexpected JMPL instr!");
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printOperand(MI->getOperand(0));
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Out << "+";
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printOperand(MI->getOperand(0));
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Out << ", ";
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printOperand(MI->getOperand(0));
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Out << endl;
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return;
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default: break;
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}
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unsigned Mask = getOperandMask(Opcode);
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bool NeedComma = false;
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for(unsigned OpNum = 0; OpNum < MI->getNumOperands(); ++OpNum) {
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if ((1 << OpNum) & Mask) continue; // Ignore this operand?
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const MachineOperand &Op = MI->getOperand(OpNum);
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if (NeedComma) Out << ", "; // Handle comma outputing
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NeedComma = true;
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printOperand(Op);
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}
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Out << endl;
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}
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