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refactor initialization of InstructionInfo to be sharable between

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instructions and InstAliases.  Start creating InstructionInfo's
for Aliases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117898 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-11-01 04:53:48 +00:00
parent 4164f6bbbf
commit c2d67bbf80
1 changed files with 46 additions and 27 deletions
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73
utils/TableGen/AsmMatcherEmitter.cpp
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@ -356,14 +356,18 @@ struct InstructionInfo {
std::string ConversionFnKind;
InstructionInfo(const CodeGenInstruction &CGI)
: TheDef(CGI.TheDef), OperandList(CGI.Operands) {
InstrName = TheDef->getName();
// TODO: Eventually support asmparser for Variant != 0.
AsmString = CGI.FlattenAsmStringVariants(CGI.AsmString, 0);
TokenizeAsmString(AsmString, Tokens);
: TheDef(CGI.TheDef), OperandList(CGI.Operands), AsmString(CGI.AsmString) {
}
InstructionInfo(const CodeGenInstAlias *Alias)
: TheDef(Alias->TheDef), OperandList(Alias->Operands),
AsmString(Alias->AsmString) {
}
void Initialize(const AsmMatcherInfo &Info,
SmallPtrSet<Record*, 16> &SingletonRegisters);
/// isAssemblerInstruction - Return true if this matchable is a valid thing to
/// match against.
bool isAssemblerInstruction(StringRef CommentDelimiter) const;
@ -545,6 +549,30 @@ void InstructionInfo::dump() {
}
}
void InstructionInfo::Initialize(const AsmMatcherInfo &Info,
SmallPtrSet<Record*, 16> &SingletonRegisters) {
InstrName = TheDef->getName();
// TODO: Eventually support asmparser for Variant != 0.
AsmString = CodeGenInstruction::FlattenAsmStringVariants(AsmString, 0);
TokenizeAsmString(AsmString, Tokens);
// Compute the require features.
std::vector<Record*> Predicates =TheDef->getValueAsListOfDefs("Predicates");
for (unsigned i = 0, e = Predicates.size(); i != e; ++i)
if (SubtargetFeatureInfo *Feature =
Info.getSubtargetFeature(Predicates[i]))
RequiredFeatures.push_back(Feature);
// Collect singleton registers, if used.
for (unsigned i = 0, e = Tokens.size(); i != e; ++i) {
if (Record *Reg = getSingletonRegisterForToken(i, Info))
SingletonRegisters.insert(Reg);
}
}
/// getRegisterRecord - Get the register record for \arg name, or 0.
static Record *getRegisterRecord(CodeGenTarget &Target, StringRef Name) {
for (unsigned i = 0, e = Target.getRegisters().size(); i != e; ++i) {
@ -557,8 +585,6 @@ static Record *getRegisterRecord(CodeGenTarget &Target, StringRef Name) {
}
bool InstructionInfo::isAssemblerInstruction(StringRef CommentDelimiter) const {
StringRef Name = InstrName;
// Reject instructions with no .s string.
if (AsmString.empty())
throw TGError(TheDef->getLoc(), "instruction with empty asm string");
@ -594,7 +620,7 @@ bool InstructionInfo::isAssemblerInstruction(StringRef CommentDelimiter) const {
// bunch of instructions. It is unclear what the right answer is for this.
if (Tokens[i][0] == '$' && !OperandNames.insert(Tokens[i]).second) {
DEBUG({
errs() << "warning: '" << Name << "': "
errs() << "warning: '" << InstrName << "': "
<< "ignoring instruction with tied operand '"
<< Tokens[i].str() << "'\n";
});
@ -869,10 +895,10 @@ void AsmMatcherInfo::BuildOperandClasses() {
AsmMatcherInfo::AsmMatcherInfo(Record *asmParser, CodeGenTarget &target)
: AsmParser(asmParser), Target(target),
RegisterPrefix(AsmParser->getValueAsString("RegisterPrefix"))
{
RegisterPrefix(AsmParser->getValueAsString("RegisterPrefix")) {
}
void AsmMatcherInfo::BuildInfo() {
// Build information about all of the AssemblerPredicates.
std::vector<Record*> AllPredicates =
@ -911,6 +937,8 @@ void AsmMatcherInfo::BuildInfo() {
OwningPtr<InstructionInfo> II(new InstructionInfo(CGI));
II->Initialize(*this, SingletonRegisters);
// Ignore instructions which shouldn't be matched and diagnose invalid
// instruction definitions with an error.
if (!II->isAssemblerInstruction(CommentDelimiter))
@ -923,30 +951,21 @@ void AsmMatcherInfo::BuildInfo() {
StringRef(II->InstrName).endswith("_Int"))
continue;
// Collect singleton registers, if used.
for (unsigned i = 0, e = II->Tokens.size(); i != e; ++i) {
if (Record *Reg = II->getSingletonRegisterForToken(i, *this))
SingletonRegisters.insert(Reg);
}
// Compute the require features.
std::vector<Record*> Predicates =
CGI.TheDef->getValueAsListOfDefs("Predicates");
for (unsigned i = 0, e = Predicates.size(); i != e; ++i)
if (SubtargetFeatureInfo *Feature = getSubtargetFeature(Predicates[i]))
II->RequiredFeatures.push_back(Feature);
Instructions.push_back(II.take());
Instructions.push_back(II.take());
}
// Parse all of the InstAlias definitions.
// Parse all of the InstAlias definitions and stick them in the list of
// matchables.
std::vector<Record*> AllInstAliases =
Records.getAllDerivedDefinitions("InstAlias");
for (unsigned i = 0, e = AllInstAliases.size(); i != e; ++i) {
CodeGenInstAlias *Alias = new CodeGenInstAlias(AllInstAliases[i]);
OwningPtr<InstructionInfo> II(new InstructionInfo(Alias));
(void)Alias;
II->Initialize(*this, SingletonRegisters);
//Instructions.push_back(II.take());
}
// Build info for the register classes.