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[ExecutionEngine] Allow JIT clients to enable/disable module verification.
Previously module verification was always enabled, with no way to turn it off. As of this commit, module verification is on by default in Debug builds, and off by default in release builds. The default behaviour can be overridden by calling setVerifyModules(bool) on the JIT instance (this works for both the old JIT, and MCJIT). <rdar://problem/16150008> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206561 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -157,7 +157,7 @@ JIT::JIT(Module *M, TargetMachine &tm, TargetJITInfo &tji,
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// Turn the machine code intermediate representation into bytes in memory that
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// may be executed.
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if (TM.addPassesToEmitMachineCode(PM, *JCE)) {
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if (TM.addPassesToEmitMachineCode(PM, *JCE, !getVerifyModules())) {
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report_fatal_error("Target does not support machine code emission!");
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}
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@@ -190,7 +190,7 @@ void JIT::addModule(Module *M) {
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// Turn the machine code intermediate representation into bytes in memory
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// that may be executed.
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if (TM.addPassesToEmitMachineCode(PM, *JCE)) {
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if (TM.addPassesToEmitMachineCode(PM, *JCE, !getVerifyModules())) {
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report_fatal_error("Target does not support machine code emission!");
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}
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@@ -222,7 +222,7 @@ bool JIT::removeModule(Module *M) {
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// Turn the machine code intermediate representation into bytes in memory
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// that may be executed.
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if (TM.addPassesToEmitMachineCode(PM, *JCE)) {
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if (TM.addPassesToEmitMachineCode(PM, *JCE, !getVerifyModules())) {
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report_fatal_error("Target does not support machine code emission!");
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}
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