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ignore register zero in isRegTiedToUseOperand, following the example of
isRegTiedToDefOperand. Thanks to Bob for pointing this out! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68734 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -698,7 +698,7 @@ bool MachineInstr::isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx){
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if (getOpcode() == TargetInstrInfo::INLINEASM) {
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if (getOpcode() == TargetInstrInfo::INLINEASM) {
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assert(DefOpIdx >= 2);
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assert(DefOpIdx >= 2);
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const MachineOperand &MO = getOperand(DefOpIdx);
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const MachineOperand &MO = getOperand(DefOpIdx);
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if (!MO.isReg() || !MO.isDef())
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if (!MO.isReg() || !MO.isDef() || MO.getReg() == 0)
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return false;
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return false;
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// Determine the actual operand no corresponding to this index.
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// Determine the actual operand no corresponding to this index.
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unsigned DefNo = 0;
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unsigned DefNo = 0;
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