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Fix Thumb and Thumb2 tests to be register allocator independent.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128690 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2011-03-31 23:31:50 +00:00
parent ae0855401b
commit c3178f85b5
5 changed files with 27 additions and 23 deletions
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27
test/CodeGen/Thumb/dyn-stackalloc.ll
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@ -1,4 +1,5 @@
; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-cgp-branch-opts | FileCheck %s
; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-cgp-branch-opts -disable-post-ra | FileCheck %s
; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-cgp-branch-opts -disable-post-ra -regalloc=basic | FileCheck %s
%struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
%struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* }
@ -7,9 +8,10 @@ define void @t1(%struct.state* %v) {
; CHECK: t1:
; CHECK: push
; CHECK: add r7, sp, #12
; CHECK: mov r2, sp
; CHECK: subs r4, r2, r1
; CHECK: mov sp, r4
; CHECK: lsls r[[R0:[0-9]+]]
; CHECK: mov r[[R1:[0-9]+]], sp
; CHECK: subs r[[R2:[0-9]+]], r[[R1]], r[[R0]]
; CHECK: mov sp, r[[R2]]
%tmp6 = load i32* null
%tmp8 = alloca float, i32 %tmp6
store i32 1, i32* null
@ -40,15 +42,16 @@ define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) {
; CHECK: t2:
; CHECK: push
; CHECK: add r7, sp, #12
; CHECK: sub sp, #8
; CHECK: mov r6, sp
; CHECK: str r2, [r6, #4]
; CHECK: str r0, [r6]
; CHECK: sub sp, #
; CHECK: mov r[[R0:[0-9]+]], sp
; CHECK: str r{{[0-9+]}}, [r[[R0]]
; CHECK: str r{{[0-9+]}}, [r[[R0]]
; CHECK-NOT: ldr r0, [sp
; CHECK: ldr r0, [r6, #4]
; CHECK: mov r0, sp
; CHECK: subs r5, r0, r1
; CHECK: mov sp, r5
; CHECK: mov r[[R1:[0-9]+]], sp
; CHECK: subs r[[R2:[0-9]+]], r[[R1]], r{{[0-9]+}}
; CHECK: mov sp, r[[R2]]
; CHECK-NOT: ldr r0, [sp
; CHECK: bx
%tmp1 = call i32 @strlen( i8* %tag )
%tmp3 = call i32 @strlen( i8* %contents )
%tmp4 = add i32 %tmp1, 2

3
test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll
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@ -1,4 +1,5 @@
; RUN: llc < %s -mtriple=thumbv7-eabi -mcpu=cortex-a8 -float-abi=hard | FileCheck %s
; RUN: llc < %s -mtriple=thumbv7-eabi -mcpu=cortex-a8 -float-abi=hard -regalloc=basic | FileCheck %s
; PR5204
%"struct.__gnu_cxx::__normal_iterator<char*,std::basic_string<char, std::char_traits<char>, std::allocator<char> > >" = type { i8* }
@ -11,7 +12,7 @@
define weak arm_aapcs_vfpcc i32 @_ZNKSs7compareERKSs(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this, %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %__str) {
; CHECK: _ZNKSs7compareERKSs:
; CHECK: it eq
; CHECK-NEXT: subeq r0, r6, r7
; CHECK-NEXT: subeq r0, r{{[0-9]+}}, r{{[0-9]+}}
; CHECK-NEXT: ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
entry:
%0 = tail call arm_aapcs_vfpcc i32 @_ZNKSs4sizeEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this) ; <i32> [#uses=3]

14
test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll
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@ -1,7 +1,8 @@
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 \
; RUN: -pre-RA-sched=source | FileCheck -check-prefix=SOURCE %s
; RUN: -pre-RA-sched=source | FileCheck %s
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 \
; RUN: -pre-RA-sched=list-hybrid | FileCheck -check-prefix=HYBRID %s
; RUN: -pre-RA-sched=list-hybrid | FileCheck %s
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -regalloc=basic | FileCheck %s
; Radar 7459078
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
@ -13,11 +14,10 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-
%s5 = type { i32 }
; Make sure the cmp is not scheduled before the InlineAsm that clobbers cc.
; SOURCE: InlineAsm End
; SOURCE: cmp
; SOURCE: beq
; HYBRID: InlineAsm End
; HYBRID: cbz
; CHECK: blx _f2
; CHECK: cmp r0, #0
; CHECK-NOT: cmp
; CHECK: InlineAsm Start
define void @test(%s1* %this, i32 %format, i32 %w, i32 %h, i32 %levels, i32* %s, i8* %data, i32* nocapture %rowbytes, void (i8*, i8*)* %release, i8* %info) nounwind {
entry:
%tmp1 = getelementptr inbounds %s1* %this, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0

2
test/CodeGen/Thumb2/ldr-str-imm12.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim | FileCheck %s
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim -regalloc=linearscan | FileCheck %s
; rdar://7352504
; Make sure we use "str r9, [sp, #+28]" instead of "sub.w r4, r7, #256" followed by "str r9, [r4, #-32]".

2
test/CodeGen/Thumb2/thumb2-ldrd.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+thumb2 -regalloc=linearscan | FileCheck %s
@b = external global i64*