diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp index c356f09a691..8181e9c17f3 100644 --- a/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -294,7 +294,7 @@ static SDOperand LowerFORMAL_ARGUMENT(SDOperand Op, SelectionDAG &DAG, static SDOperand LowerConstantPool(SDOperand Op, SelectionDAG &DAG) { MVT::ValueType PtrVT = Op.getValueType(); ConstantPoolSDNode *CP = cast(Op); - Constant *C = CP->get(); + Constant *C = CP->getConstVal(); SDOperand CPI = DAG.getTargetConstantPool(C, PtrVT, CP->getAlignment()); return CPI; diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp index fde5801f5d4..a9649ab9a31 100644 --- a/lib/Target/Alpha/AlphaISelLowering.cpp +++ b/lib/Target/Alpha/AlphaISelLowering.cpp @@ -436,7 +436,7 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { } case ISD::ConstantPool: { ConstantPoolSDNode *CP = cast(Op); - Constant *C = CP->get(); + Constant *C = CP->getConstVal(); SDOperand CPI = DAG.getTargetConstantPool(C, MVT::i64, CP->getAlignment()); SDOperand Hi = DAG.getNode(AlphaISD::GPRelHi, MVT::i64, CPI, diff --git a/lib/Target/IA64/IA64ISelDAGToDAG.cpp b/lib/Target/IA64/IA64ISelDAGToDAG.cpp index 9365b545c4f..8367d245cf1 100644 --- a/lib/Target/IA64/IA64ISelDAGToDAG.cpp +++ b/lib/Target/IA64/IA64ISelDAGToDAG.cpp @@ -429,7 +429,7 @@ SDNode *IA64DAGToDAGISel::Select(SDOperand Op) { case ISD::ConstantPool: { // TODO: nuke the constant pool // (ia64 doesn't need one) ConstantPoolSDNode *CP = cast(N); - Constant *C = CP->get(); + Constant *C = CP->getConstVal(); SDOperand CPI = CurDAG->getTargetConstantPool(C, MVT::i64, CP->getAlignment()); return CurDAG->getTargetNode(IA64::ADDL_GA, MVT::i64, // ? diff --git a/lib/Target/IA64/IA64ISelLowering.cpp b/lib/Target/IA64/IA64ISelLowering.cpp index 2a64570be88..859530e409a 100644 --- a/lib/Target/IA64/IA64ISelLowering.cpp +++ b/lib/Target/IA64/IA64ISelLowering.cpp @@ -136,7 +136,7 @@ static bool isFloatingPointZero(SDOperand Op) { else if (Op.getOpcode() == ISD::EXTLOAD || Op.getOpcode() == ISD::LOAD) { // Maybe this has already been legalized into the constant pool? if (ConstantPoolSDNode *CP = dyn_cast(Op.getOperand(1))) - if (ConstantFP *CFP = dyn_cast(CP->get())) + if (ConstantFP *CFP = dyn_cast(CP->getConstVal())) return CFP->isExactlyValue(-0.0) || CFP->isExactlyValue(0.0); } return false; diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 31e209adf41..db33f5f38e9 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -314,7 +314,7 @@ static bool isFloatingPointZero(SDOperand Op) { else if (Op.getOpcode() == ISD::EXTLOAD || Op.getOpcode() == ISD::LOAD) { // Maybe this has already been legalized into the constant pool? if (ConstantPoolSDNode *CP = dyn_cast(Op.getOperand(1))) - if (ConstantFP *CFP = dyn_cast(CP->get())) + if (ConstantFP *CFP = dyn_cast(CP->getConstVal())) return CFP->isExactlyValue(-0.0) || CFP->isExactlyValue(0.0); } return false; @@ -601,7 +601,7 @@ SDOperand PPC::get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG) { static SDOperand LowerConstantPool(SDOperand Op, SelectionDAG &DAG) { MVT::ValueType PtrVT = Op.getValueType(); ConstantPoolSDNode *CP = cast(Op); - Constant *C = CP->get(); + Constant *C = CP->getConstVal(); SDOperand CPI = DAG.getTargetConstantPool(C, PtrVT, CP->getAlignment()); SDOperand Zero = DAG.getConstant(0, PtrVT); diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp index a30e7394207..1d1b595743c 100644 --- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp +++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp @@ -704,7 +704,7 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) { return DAG.getNode(ISD::ADD, MVT::i32, Lo, Hi); } case ISD::ConstantPool: { - Constant *C = cast(Op)->get(); + Constant *C = cast(Op)->getConstVal(); SDOperand CP = DAG.getTargetConstantPool(C, MVT::i32, cast(Op)->getAlignment()); SDOperand Hi = DAG.getNode(SPISD::Hi, MVT::i32, CP); diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 4287ab27912..20e7edc668f 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -540,7 +540,7 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM, if (ConstantPoolSDNode *CP = dyn_cast(N.getOperand(0))) { if (AM.CP == 0) { - AM.CP = CP->get(); + AM.CP = CP->getConstVal(); AM.Align = CP->getAlignment(); AM.Disp += CP->getOffset(); if (isRIP) @@ -872,7 +872,7 @@ SDNode *X86DAGToDAGISel::Select(SDOperand N) { G->getOffset() + Offset); } else if (ConstantPoolSDNode *CP = dyn_cast(N0.getOperand(0))) { - C = CurDAG->getTargetConstantPool(CP->get(), PtrVT, + C = CurDAG->getTargetConstantPool(CP->getConstVal(), PtrVT, CP->getAlignment(), CP->getOffset()+Offset); } diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 2897eee251b..5da23f93447 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -3329,8 +3329,9 @@ SDOperand X86TargetLowering::LowerConstantPool(SDOperand Op, SelectionDAG &DAG) { ConstantPoolSDNode *CP = cast(Op); SDOperand Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), - DAG.getTargetConstantPool(CP->get(), getPointerTy(), - CP->getAlignment())); + DAG.getTargetConstantPool(CP->getConstVal(), + getPointerTy(), + CP->getAlignment())); if (Subtarget->isTargetDarwin()) { // With PIC, the address is actually $g + Offset. if (!Subtarget->is64Bit() &&