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misched: DAG builder must special case earlyclobber

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155459 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick 2012-04-24 18:04:41 +00:00
parent 000b2504ee
commit c3ad885dac
1 changed files with 9 additions and 0 deletions
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9
lib/CodeGen/ScheduleDAGInstrs.cpp
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@ -442,6 +442,15 @@ void ScheduleDAGInstrs::addVRegUseDeps(SUnit *SU, unsigned OperIdx) {
SlotIndex UseIdx = LIS->getInstructionIndex(MI).getRegSlot();
LiveInterval *LI = &LIS->getInterval(Reg);
VNInfo *VNI = LI->getVNInfoBefore(UseIdx);
// Special case: An early-clobber tied operand reads and writes the
// register one slot early. e.g. InlineAsm.
//
// FIXME: Same special case is in shrinkToUses. Hide under an API.
if (SlotIndex::isSameInstr(VNI->def, UseIdx)) {
UseIdx = VNI->def;
VNI = LI->getVNInfoBefore(UseIdx);
}
// VNI will be valid because MachineOperand::readsReg() is checked by caller.
MachineInstr *Def = LIS->getInstructionFromIndex(VNI->def);
// Phis and other noninstructions (after coalescing) have a NULL Def.