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Combine the F2 and F3 instruction classes into one file for simplicity

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16484 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman 2004-09-22 21:38:42 +00:00
parent 31b5edd2e9
commit c42077d371
6 changed files with 80 additions and 98 deletions
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42
lib/Target/Sparc/SparcV8InstrInfo_F3.td → lib/Target/Sparc/SparcInstrFormats.td
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@ -1,14 +1,50 @@
//===- SparcV8Instrs_F3.td - Format 3 Instructions: SparcV8 Target --------===// //===- SparcV8InstrFormats.td - SparcV8 Instr Formats ------*- tablegen -*-===//
// //
// The LLVM Compiler Infrastructure // The LLVM Compiler Infrastructure
// //
// This file was developed by the LLVM research group and is distributed under // This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details. // the University of Illinois Open Source License. See LICENSE.TXT for details.
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Format #2 instruction classes in the SparcV8
//===----------------------------------------------------------------------===//
class F2 : InstV8 { // Format 2 instructions
bits<3> op2;
bits<22> imm22;
let op = 0; // op = 0
let Inst{24-22} = op2;
let Inst{21-0} = imm22;
}
// Specific F2 classes: SparcV8 manual, page 44
// //
class F2_1<bits<3> op2Val, string name> : F2 {
bits<5> rd;
bits<22> imm;
let op2 = op2Val;
let Name = name;
let Inst{29-25} = rd;
}
class F2_2<bits<4> condVal, bits<3> op2Val, string name> : F2 {
bits<4> cond;
bit annul = 0; // currently unused
let cond = condVal;
let op2 = op2Val;
let Name = name;
let Inst{29} = annul;
let Inst{28-25} = cond;
}
//===----------------------------------------------------------------------===//
// Format #3 instruction classes in the SparcV8 // Format #3 instruction classes in the SparcV8
//
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
class F3 : InstV8 { class F3 : InstV8 {

3
lib/Target/Sparc/SparcInstrInfo.td
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@ -28,8 +28,7 @@ class InstV8 : Instruction { // SparcV8 instruction baseline
bit isPrivileged = 0; // Is this a privileged instruction? bit isPrivileged = 0; // Is this a privileged instruction?
} }
include "SparcV8InstrInfo_F2.td" include "SparcV8InstrFormats.td"
include "SparcV8InstrInfo_F3.td"
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Instructions // Instructions

44
lib/Target/Sparc/SparcV8InstrInfo_F2.td
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@ -1,44 +0,0 @@
//===- SparcV8Instrs_F2.td - Format 2 instructions: SparcV8 Target --------===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// Format #2 instruction classes in the SparcV8
//
//===----------------------------------------------------------------------===//
class F2 : InstV8 { // Format 2 instructions
bits<3> op2;
bits<22> imm22;
let op = 0; // op = 0
let Inst{24-22} = op2;
let Inst{21-0} = imm22;
}
// Specific F2 classes: SparcV8 manual, page 44
//
class F2_1<bits<3> op2Val, string name> : F2 {
bits<5> rd;
bits<22> imm;
let op2 = op2Val;
let Name = name;
let Inst{29-25} = rd;
}
class F2_2<bits<4> condVal, bits<3> op2Val, string name> : F2 {
bits<4> cond;
bit annul = 0; // currently unused
let cond = condVal;
let op2 = op2Val;
let Name = name;
let Inst{29} = annul;
let Inst{28-25} = cond;
}

42
lib/Target/SparcV8/SparcV8InstrInfo_F3.td → lib/Target/SparcV8/SparcV8InstrFormats.td
View File

@ -1,14 +1,50 @@
//===- SparcV8Instrs_F3.td - Format 3 Instructions: SparcV8 Target --------===// //===- SparcV8InstrFormats.td - SparcV8 Instr Formats ------*- tablegen -*-===//
// //
// The LLVM Compiler Infrastructure // The LLVM Compiler Infrastructure
// //
// This file was developed by the LLVM research group and is distributed under // This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details. // the University of Illinois Open Source License. See LICENSE.TXT for details.
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Format #2 instruction classes in the SparcV8
//===----------------------------------------------------------------------===//
class F2 : InstV8 { // Format 2 instructions
bits<3> op2;
bits<22> imm22;
let op = 0; // op = 0
let Inst{24-22} = op2;
let Inst{21-0} = imm22;
}
// Specific F2 classes: SparcV8 manual, page 44
// //
class F2_1<bits<3> op2Val, string name> : F2 {
bits<5> rd;
bits<22> imm;
let op2 = op2Val;
let Name = name;
let Inst{29-25} = rd;
}
class F2_2<bits<4> condVal, bits<3> op2Val, string name> : F2 {
bits<4> cond;
bit annul = 0; // currently unused
let cond = condVal;
let op2 = op2Val;
let Name = name;
let Inst{29} = annul;
let Inst{28-25} = cond;
}
//===----------------------------------------------------------------------===//
// Format #3 instruction classes in the SparcV8 // Format #3 instruction classes in the SparcV8
//
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
class F3 : InstV8 { class F3 : InstV8 {

3
lib/Target/SparcV8/SparcV8InstrInfo.td
View File

@ -28,8 +28,7 @@ class InstV8 : Instruction { // SparcV8 instruction baseline
bit isPrivileged = 0; // Is this a privileged instruction? bit isPrivileged = 0; // Is this a privileged instruction?
} }
include "SparcV8InstrInfo_F2.td" include "SparcV8InstrFormats.td"
include "SparcV8InstrInfo_F3.td"
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Instructions // Instructions

44
lib/Target/SparcV8/SparcV8InstrInfo_F2.td
View File

@ -1,44 +0,0 @@
//===- SparcV8Instrs_F2.td - Format 2 instructions: SparcV8 Target --------===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// Format #2 instruction classes in the SparcV8
//
//===----------------------------------------------------------------------===//
class F2 : InstV8 { // Format 2 instructions
bits<3> op2;
bits<22> imm22;
let op = 0; // op = 0
let Inst{24-22} = op2;
let Inst{21-0} = imm22;
}
// Specific F2 classes: SparcV8 manual, page 44
//
class F2_1<bits<3> op2Val, string name> : F2 {
bits<5> rd;
bits<22> imm;
let op2 = op2Val;
let Name = name;
let Inst{29-25} = rd;
}
class F2_2<bits<4> condVal, bits<3> op2Val, string name> : F2 {
bits<4> cond;
bit annul = 0; // currently unused
let cond = condVal;
let op2 = op2Val;
let Name = name;
let Inst{29} = annul;
let Inst{28-25} = cond;
}