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Rewrite and simplify o32 vaarg passing, no functional changes. Patch by Sasa Stankovic

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127029 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes 2011-03-04 20:27:44 +00:00
parent 89e0f386f3
commit c42fb5f81c
1 changed files with 19 additions and 37 deletions
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54
lib/Target/Mips/MipsISelLowering.cpp
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@ -963,46 +963,28 @@ static bool CC_MipsO32_VarArgs(unsigned ValNo, MVT ValVT,
LocInfo = CCValAssign::AExt;
}
unsigned Reg;
if (ValVT == MVT::i32 || ValVT == MVT::f32) {
if (unsigned Reg = State.AllocateReg(IntRegs, IntRegsSize)) {
State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, MVT::i32, LocInfo));
return false;
}
unsigned Off = State.AllocateStack(4, 4);
State.addLoc(CCValAssign::getMem(ValNo, ValVT, Off, LocVT, LocInfo));
return false;
}
unsigned UnallocIntReg = State.getFirstUnallocated(IntRegs, IntRegsSize);
if (ValVT == MVT::f64) {
if (IntRegs[UnallocIntReg] == (unsigned (Mips::A1))) {
// A1 can't be used anymore, because 64 bit arguments
// must be aligned when copied back to the caller stack
Reg = State.AllocateReg(IntRegs, IntRegsSize);
LocVT = MVT::i32;
} else if (ValVT == MVT::f64) {
Reg = State.AllocateReg(IntRegs, IntRegsSize);
if (Reg == Mips::A1 || Reg == Mips::A3)
Reg = State.AllocateReg(IntRegs, IntRegsSize);
State.AllocateReg(IntRegs, IntRegsSize);
UnallocIntReg++;
}
LocVT = MVT::i32;
} else
llvm_unreachable("Cannot handle this ValVT.");
if (IntRegs[UnallocIntReg] == (unsigned (Mips::A0)) ||
IntRegs[UnallocIntReg] == (unsigned (Mips::A2))) {
unsigned Reg = State.AllocateReg(IntRegs, IntRegsSize);
State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, MVT::i32, LocInfo));
// Shadow the next register so it can be used
// later to get the other 32bit part.
State.AllocateReg(IntRegs, IntRegsSize);
return false;
}
if (!Reg) {
unsigned SizeInBytes = ValVT.getSizeInBits() >> 3;
unsigned Offset = State.AllocateStack(SizeInBytes, SizeInBytes);
State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
} else
State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
// Register is shadowed to preserve alignment, and the
// argument goes to a stack location.
if (UnallocIntReg != IntRegsSize)
State.AllocateReg(IntRegs, IntRegsSize);
unsigned Off = State.AllocateStack(8, 8);
State.addLoc(CCValAssign::getMem(ValNo, ValVT, Off, LocVT, LocInfo));
return false;
}
return true; // CC didn't match
return false; // CC must always match
}
//===----------------------------------------------------------------------===//